VLSI DV Interview Puzzles · All levels

join_any Without Cleanup

Predict the timeline when `join_any` is used but no `disable fork` follows.

Puzzle

Difficulty: Medium · Puzzle 5 of 6 · Topic: Fork Join Puzzles

Predict the timeline when `join_any` is used but no `disable fork` follows.

Code

systemverilog

module p5;
  initial begin
    fork
      begin #4 $display("%0t fast", $time); end
      begin #9 $display("%0t slow", $time); end
    join_any
    $display("%0t after_any", $time);
    #10 $display("%0t later", $time);
  end
endmodule

Hint

`join_any` only releases the parent when one child finishes. It does not terminate remaining children.

Step-by-step solution

diagram

1) `fast` branch ends first at t=4.
2) Parent resumes at t=4 and prints `after_any`.
3) `slow` branch is still alive and prints at t=9.
4) Parent waits #10 from t=4 and prints `later` at t=14.

Answer

Answer: fast@4, after_any@4, slow@9, later@14

Why candidates get it wrong

Interviewees often assume `join_any` implies automatic cancellation of remaining branches.

Interviewer follow-up

What minimal code change guarantees `slow` cannot print?

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