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Course contents

  • How to Use This Puzzle Bank
  • SystemVerilog Language Puzzles25
    • Datatype and Bit Puzzles
    • Fork Join Puzzles
      • join vs join_any vs join_none
      • Loop Variable Capture in Detached Threads
      • wait fork Synchronization Point
      • disable Named Fork Scope
      • join_any Without Cleanup
      • Inner disable fork Does Not Kill Outer Sibling
    • Queue and Array Puzzles
    • String and Casting Puzzles
    • SystemVerilog Language Puzzles: Tricky Q&A
  • Difficulty Guide
  • Full Topic Map
  • Interview-Day Tips
  • OOP & Testbench Puzzles25
  • Concurrency & Timing Puzzles25
  • Randomization & Constraint Puzzles25
  • SVA Assertion Puzzles25
  • Functional Coverage Puzzles25
  • Logic & Aptitude Puzzles25
  • Scenario & Debug Puzzles25
  • Interview Prep: Puzzle Rounds5
  • DV Puzzle Cheatsheet
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‹Fork Join Puzzles
  1. Topics
  2. DV Interview Puzzles
  3. SystemVerilog Language Puzzles
  4. Fork Join Puzzles
  5. join_any Without Cleanup

VLSI DV Interview Puzzles · All levels

join_any Without Cleanup

Predict the timeline when `join_any` is used but no `disable fork` follows.

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    Puzzle

    Difficulty: Medium · Puzzle 5 of 6 · Topic: Fork Join Puzzles

    Predict the timeline when `join_any` is used but no `disable fork` follows.

    Code

    p5.sv
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    module p5;
      initial begin
        fork
          begin #4 $display("%0t fast", $time); end
          begin #9 $display("%0t slow", $time); end
        join_any
        $display("%0t after_any", $time);
        #10 $display("%0t later", $time);
      end
    endmodule

    Hint

    `join_any` only releases the parent when one child finishes. It does not terminate remaining children.

    Step-by-step solution

    Diagram
    1) `fast` branch ends first at t=4.
    2) Parent resumes at t=4 and prints `after_any`.
    3) `slow` branch is still alive and prints at t=9.
    4) Parent waits #10 from t=4 and prints `later` at t=14.

    Answer

    Answer: fast@4, after_any@4, slow@9, later@14

    Why candidates get it wrong

    Interviewees often assume `join_any` implies automatic cancellation of remaining branches.

    Interviewer follow-up

    What minimal code change guarantees `slow` cannot print?

    Related topics

    • Back to Fork Join Puzzles

    • SystemVerilog Language Puzzles section

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    See also

    • join vs join_any vs join_none
    • Loop Variable Capture in Detached Threads
    • wait fork Synchronization Point