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Course contents

  • How to Use This Puzzle Bank
  • SystemVerilog Language Puzzles25
  • Difficulty Guide
  • Full Topic Map
  • Interview-Day Tips
  • OOP & Testbench Puzzles25
  • Concurrency & Timing Puzzles25
  • Randomization & Constraint Puzzles25
  • SVA Assertion Puzzles25
    • Sequence Puzzles
      • Exact Delay Then Bounded Hold
      • Goto Repetition With Sparse Events
      • Nonconsecutive Repetition [=2]
      • Sequence and Operator
      • Intersect End-Time Mismatch
      • within and Alternative Windows
    • Implication Puzzles
    • Temporal Corner Puzzles
    • Assertion Debug Puzzles
    • SVA Assertion Puzzles: Tricky Q&A
  • Functional Coverage Puzzles25
  • Logic & Aptitude Puzzles25
  • Scenario & Debug Puzzles25
  • Interview Prep: Puzzle Rounds5
  • DV Puzzle Cheatsheet
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‹Sequence Puzzles
  1. Topics
  2. DV Interview Puzzles
  3. SVA Assertion Puzzles
  4. Sequence Puzzles
  5. Nonconsecutive Repetition [=2]

VLSI DV Interview Puzzles · All levels

Nonconsecutive Repetition [=2]

Property intent: after start, match two nonconsecutive a occurrences, then one cycle later done. Timeline: C30 start=1, C31 a=1, C33 a=1, C34 a=0, C35 d1. Determine the verdict.

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    Puzzle

    Difficulty: Hard · Puzzle 3 of 6 · Topic: Sequence Puzzles

    Property intent: after start, match two nonconsecutive a occurrences, then one cycle later done. Timeline: C30 start=1, C31 a=1, C33 a=1, C34 a=0, C35 done=1. Determine the verdict.

    Code

    design.sv
    property p_seq_nonconsecutive;
      @(posedge clk) start |-> a[=2] ##1 done;
    endproperty

    Hint

    Recall that [=n] is nonconsecutive repetition and is not the same as [*n].

    Step-by-step solution

    Diagram
    1) start triggers at C30.
    2) a[=2] finds two a matches at C31 and C33 with a legal gap at C32.
    3) The sequence can still complete before checking done.
    4) done at C35 satisfies ##1 from the chosen sequence end.

    Answer

    Answer: PASS - the two required nonconsecutive a matches occur, and done is observed one cycle after a legal end point of the [=2] match.

    Why candidates get it wrong

    People often conflate [=n] with [->n]; the end-point flexibility differs and changes timing outcomes.

    Interviewer follow-up

    Would adding an extra a pulse at C34 necessarily invalidate this match? Explain match-end selection.

    Related topics

    • Back to Sequence Puzzles

    • SVA Assertion Puzzles section

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    See also

    • Exact Delay Then Bounded Hold
    • Intersect End-Time Mismatch
    • within and Alternative Windows