VLSI DV Interview Puzzles · All levels
Implication Puzzles
Overlapped vs non-overlapped implication, vacuity, and chained consequent timing with real protocol examples.
About this puzzle set
Overlapped vs non-overlapped implication, vacuity, and chained consequent timing with real protocol examples.
Puzzles in this topic
diagram
1. Overlap vs Non-Overlap [Easy]
2. Pure Vacuity [Easy]
3. Chained Consequent With ## [Medium]
4. Non-Overlapped Window [Medium]
5. throughout in Consequent [Hard]
6. OR Antecedent Trigger [Medium]Work each puzzle before reading the solution: predict the exact output or answer, name the rule that governs it, then check yourself.