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Course contents

  • How to Use This Puzzle Bank
  • SystemVerilog Language Puzzles25
  • Difficulty Guide
  • Full Topic Map
  • Interview-Day Tips
  • OOP & Testbench Puzzles25
  • Concurrency & Timing Puzzles25
  • Randomization & Constraint Puzzles25
  • SVA Assertion Puzzles25
    • Sequence Puzzles
    • Implication Puzzles
      • Overlap vs Non-Overlap
      • Pure Vacuity
      • Chained Consequent With ##
      • Non-Overlapped Window
      • throughout in Consequent
      • OR Antecedent Trigger
    • Temporal Corner Puzzles
    • Assertion Debug Puzzles
    • SVA Assertion Puzzles: Tricky Q&A
  • Functional Coverage Puzzles25
  • Logic & Aptitude Puzzles25
  • Scenario & Debug Puzzles25
  • Interview Prep: Puzzle Rounds5
  • DV Puzzle Cheatsheet
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‹Implication Puzzles
  1. Topics
  2. DV Interview Puzzles
  3. SVA Assertion Puzzles
  4. Implication Puzzles
  5. OR Antecedent Trigger

VLSI DV Interview Puzzles · All levels

OR Antecedent Trigger

Property intent: if either request source rises, grant must follow one cycle later. Timeline: C40 req_a stable 0, req_b rises 0->1 at C40, C41 grant=1. Determine the verdict.

On this page

    Puzzle

    Difficulty: Medium · Puzzle 6 of 6 · Topic: Implication Puzzles

    Property intent: if either request source rises, grant must follow one cycle later. Timeline: C40 req_a stable 0, req_b rises 0->1 at C40, C41 grant=1. Determine the verdict.

    Code

    design.sv
    property p_or_antecedent;
      @(posedge clk) ($rose(req_a) or $rose(req_b)) |-> ##1 grant;
    endproperty

    Hint

    Only one side of the OR needs to trigger the implication.

    Step-by-step solution

    Diagram
    1) At C40, $rose(req_b) is true while $rose(req_a) is false.
    2) OR antecedent is therefore true, so a checking thread is spawned.
    3) ##1 grant requires grant at C41.
    4) grant is high at C41, satisfying the consequent.

    Answer

    Answer: PASS - a valid antecedent trigger occurs via req_b, and grant meets the one-cycle-later requirement.

    Why candidates get it wrong

    Under pressure, candidates may incorrectly treat OR antecedent as needing both rises in the same cycle.

    Interviewer follow-up

    If neither request rose, what exact verdict label should this property report?

    Related topics

    • Back to Implication Puzzles

    • SVA Assertion Puzzles section

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    See also

    • Overlap vs Non-Overlap
    • Pure Vacuity
    • Chained Consequent With ##