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Course contents

  • How to Use This Puzzle Bank
  • SystemVerilog Language Puzzles25
  • Difficulty Guide
  • Full Topic Map
  • Interview-Day Tips
  • OOP & Testbench Puzzles25
  • Concurrency & Timing Puzzles25
  • Randomization & Constraint Puzzles25
  • SVA Assertion Puzzles25
    • Sequence Puzzles
    • Implication Puzzles
      • Overlap vs Non-Overlap
      • Pure Vacuity
      • Chained Consequent With ##
      • Non-Overlapped Window
      • throughout in Consequent
      • OR Antecedent Trigger
    • Temporal Corner Puzzles
    • Assertion Debug Puzzles
    • SVA Assertion Puzzles: Tricky Q&A
  • Functional Coverage Puzzles25
  • Logic & Aptitude Puzzles25
  • Scenario & Debug Puzzles25
  • Interview Prep: Puzzle Rounds5
  • DV Puzzle Cheatsheet
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‹Implication Puzzles
  1. Topics
  2. DV Interview Puzzles
  3. SVA Assertion Puzzles
  4. Implication Puzzles
  5. Chained Consequent With ##

VLSI DV Interview Puzzles · All levels

Chained Consequent With ##

Property intent: after req, ack must appear after 1 cycle, then done exactly 2 cycles after ack. Timeline: C10 req=1, C11 ack=1, C12 d1, C13 d0. Determine the verdict.

On this page

    Puzzle

    Difficulty: Medium · Puzzle 3 of 6 · Topic: Implication Puzzles

    Property intent: after req, ack must appear after 1 cycle, then done exactly 2 cycles after ack. Timeline: C10 req=1, C11 ack=1, C12 done=1, C13 done=0. Determine the verdict.

    Code

    design.sv
    property p_chain;
      @(posedge clk) req |-> ##1 ack ##2 done;
    endproperty

    Hint

    Compute the done check cycle from the acknowledged point.

    Step-by-step solution

    Diagram
    1) req at C10 triggers consequent.
    2) ##1 ack requires ack at C11, which is satisfied.
    3) ##2 done then requires done at C13.
    4) done is high at C12 only, so the required C13 sample fails.

    Answer

    Answer: FAIL - ack timing is correct, but done arrives one cycle too early relative to the chained ##2 requirement.

    Why candidates get it wrong

    Candidates often compress chained delays mentally and accidentally check done at C12.

    Interviewer follow-up

    How would verdict change if done were high at both C12 and C13?

    Related topics

    • Back to Implication Puzzles

    • SVA Assertion Puzzles section

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    See also

    • Overlap vs Non-Overlap
    • throughout in Consequent
    • OR Antecedent Trigger