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Course contents

  • How to Use This Puzzle Bank
  • SystemVerilog Language Puzzles25
  • Difficulty Guide
  • Full Topic Map
  • Interview-Day Tips
  • OOP & Testbench Puzzles25
  • Concurrency & Timing Puzzles25
  • Randomization & Constraint Puzzles25
  • SVA Assertion Puzzles25
    • Sequence Puzzles
    • Implication Puzzles
      • Overlap vs Non-Overlap
      • Pure Vacuity
      • Chained Consequent With ##
      • Non-Overlapped Window
      • throughout in Consequent
      • OR Antecedent Trigger
    • Temporal Corner Puzzles
    • Assertion Debug Puzzles
    • SVA Assertion Puzzles: Tricky Q&A
  • Functional Coverage Puzzles25
  • Logic & Aptitude Puzzles25
  • Scenario & Debug Puzzles25
  • Interview Prep: Puzzle Rounds5
  • DV Puzzle Cheatsheet
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‹Implication Puzzles
  1. Topics
  2. DV Interview Puzzles
  3. SVA Assertion Puzzles
  4. Implication Puzzles
  5. Pure Vacuity

VLSI DV Interview Puzzles · All levels

Pure Vacuity

Property intent: every req must be granted within 0 to 2 cycles. In this test, req never becomes 1. Determine the verdict.

On this page

    Puzzle

    Difficulty: Easy · Puzzle 2 of 6 · Topic: Implication Puzzles

    Property intent: every req must be granted within 0 to 2 cycles. In this test, req never becomes 1. Determine the verdict.

    Code

    design.sv
    property p_vacuous;
      @(posedge clk) req |-> ##[0:2] gnt;
    endproperty

    Hint

    Ask whether the antecedent ever spawns a checking thread.

    Step-by-step solution

    Diagram
    1) req is never true at a sampled clock edge.
    2) No implication attempts are triggered.
    3) With no triggered antecedent, implication succeeds vacuously.

    Answer

    Answer: VACUOUS-PASS - antecedent never triggers, so no failing obligation is created.

    Why candidates get it wrong

    Vacuous pass is logically valid but dangerous if used as evidence of functional correctness without coverage.

    Interviewer follow-up

    What companion cover/assert would you add to ensure this property is meaningfully exercised?

    Related topics

    • Back to Implication Puzzles

    • SVA Assertion Puzzles section

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    See also

    • Non-Overlapped Window
    • throughout in Consequent
    • OR Antecedent Trigger