VLSI DV Interview Puzzles · All levels
Temporal Corner Puzzles
Sampled-value functions and timing history pitfalls involving $past, $rose, $fell, and $stable.
About this puzzle set
Sampled-value functions and timing history pitfalls involving $past, $rose, $fell, and $stable.
Puzzles in this topic
diagram
1. $past Startup History Hole [Medium]
2. $rose Sampled on Clock Edge [Easy]
3. $fell With Non-Overlapped Consequent [Medium]
4. $stable Repeated Hold Check [Medium]
5. Cross-Cycle Correlation With $past Depth [Hard]
6. Vector $rose Sampling Trap [Hard]Work each puzzle before reading the solution: predict the exact output or answer, name the rule that governs it, then check yourself.