VLSI DV Interview Puzzles · All levels

$past Startup History Hole

Property intent: when valid is high, data from 2 cycles ago must be 8'hA5. Timeline: reset deasserts at C0, first active check with valid=1 occurs at C1. Determine the verdict.

Puzzle

Difficulty: Medium · Puzzle 1 of 6 · Topic: Temporal Corner Puzzles

Property intent: when valid is high, data from 2 cycles ago must be 8'hA5. Timeline: reset deasserts at C0, first active check with valid=1 occurs at C1. Determine the verdict.

Code

systemverilog

property p_past_2;
  @(posedge clk) valid |-> ($past(data, 2) == 8'hA5);
endproperty

Hint

Ask whether two prior sampled cycles exist yet.

Step-by-step solution

diagram

1) valid at C1 triggers the check immediately.
2) $past(data,2) requires sampled history reaching back to C-1 relative to C1, which is unavailable in startup.
3) Tools typically evaluate this as unknown/invalid history and the comparison does not prove true.

Answer

Answer: FAIL - the first trigger occurs before a 2-cycle sampled history exists, so the $past comparison is not satisfied.

Why candidates get it wrong

Candidates assume $past auto-fills with reset values unless explicitly guarded.

Interviewer follow-up

How would you gate this property so it only starts after two valid sample edges?

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