Same endpoint may train x4 Gen4 on eval board but x1 Gen3 on product board. Package routing, via stubs, and connector quality affect per-lane margin. SI/PI team owns this evidence.
Compare LTSSM history between working and failing boards.
Lane reversal and polarity inversion are configured during training.
If a retimer is present, collect its supported diagnostics and segment training evidence; do not model it as a PCIe switch with another enumerated hop.