Two dividers make the fast clocks and one rule protects them: no live clock is ever switched with a plain mux. This topic shows how the divide-by-4 and divide-by-8 counters work and which edges coincide, recalls the handshake that makes a switch glitch-free with a simulated waveform, budgets the dead time of a switch in NanoSoC numbers, and covers the ways switching still goes wrong. For the circuit-level construction see Glitch-Free Clock Mux; here the emphasis is the integration sequence and its checks.
Lesson | After it you can... |
|---|---|
Explain the /4 and /8 chains, which edges coincide, and why NanoSoC's tree has no runtime mux. | |
Recall the switch handshake, read the switching waveform and budget a switch's dead time. | |
Name the dead-clock, constraint and ratio-sweep failures and their checks. |
Suggested order: top to bottom. Dividers first, because the switch lesson assumes two running clocks; then the sequence with its waveform; then the failures, which are all violations of the sequence. The gating topic next door covers stopping clocks; this one covers changing them.
The select can change while either clock is high, joining a truncated high pulse from one side to an early rising edge from the other. The result is a runt pulse that violates minimum pulse width everywhere downstream.