82.74 mW does not sound like heat until it sits under a plastic package on a warm board with no airflow: power becomes temperature through one multiplication, and temperature decides how long the chip may sustain RUN before it must throttle. This topic turns the NanoSoC power table into a junction temperature, writes the throttling policy that keeps it inside the limit, and prices the sleep decision that avoids the heat entirely. Every thermal resistance and ambient in it is illustrative and listed as such.
Lesson | After it you can... |
|---|---|
Compute NanoSoC junction temperature from the power table and an illustrative package model. | |
Write a sensor-trip throttling policy with hysteresis and recovery. | |
Price a sleep interval and find the nap length where SLEEP beats IDLE. |
Suggested order: top to bottom. Temperature first, because the policy protects a number; policy second, because break-even decides how often the chip sleeps instead of throttling. Readers sizing a product enclosure start here and work backwards into the power table.
Because the lever is power: throttling, gating and DVFS all act on milliwatts, while the package only sets the resistance between those milliwatts and the ambient. The integrator owns both sides of the multiplication.