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Exceptions & Audit Policy: Inputs & Outputs

Inputs & Outputs for Exceptions & Audit Policy.

Inputs and outputs contract

Inputs & Outputs for Exceptions & Audit Policy focuses on false path count, multicycle path audit rate, exception waiver backlog. The goal is to connect the observable symptom to timing mechanism, ownership, and regression risk.

Treat these as a signed interface contract. Ambiguity here is the single biggest source of wasted integration weeks, because two teams debug against different assumptions.

diagram
INPUTS
  - SDC (clocks, IO delays, exceptions)
  - Liberty libraries per corner
  - SPEF/parasitics and RC corner
  - MMMC scenario definition

OUTPUTS
  - WNS/TNS reports per scenario
  - path group summaries
  - constraint audit / waiver log
  - signoff closure memo

Timing path sequence

diagram
TIMING PATH — Exceptions & Audit Policy

launch FF --logic stages--> capture FF
     |                           |
  launch clock                capture clock
     |                           |
  required: arrival < capture_edge - setup
  metric: false path count, multicycle path audit rate, exception waiver backlog

Ownership map

diagram
OWNERSHIP MAP — Exceptions & Audit Policy

artifact              owner
----------------      -----------------
timing report       STA lead
SDC/constraint      RTL owner
implementation      verification owner

Every WNS cluster needs a named owner before ECO.

STA deep dive

SDC quality determines whether STA measures reality or fiction.

Concept diagram

diagram
SDC FLOW

RTL clocks -> create_clock / generated_clock
board      -> set_input/output_delay
exceptions -> false_path / multicycle (audited)
analysis   -> report_timing

Metric graph

diagram
CONSTRAINT QUALITY

audited exceptions  ████████████████  good
stale IO delays     ██████            risk
missing gen clock   ████              high escape

Reports and artifacts

  • clock report

  • uncertainty budget

  • IO delay coverage

  • exception audit log

Mini case study

1000 new failing paths overnight: SDC merge dropped a generated_clock on divider output. No PD change needed.

Debug branches

  • Diff SDC before ECO

  • Validate clocks on failing path

  • Audit false paths quarterly

Senior review question

Ask: what corner/mode/view proves this topic is closed or failing?

Key takeaways

  • State corner, mode, view, and database tag with every slack claim.

  • Run setup and hold plus MMMC regression after every ECO.

Common pitfalls

  • Comparing STA runs with different SPEF or SDC tags.

  • Broad false_path to green-wash violations.

  • Setup-only ECO without hold check.

Principal STA review addendum

Timing exceptions remove pessimism only when justified; bad exceptions hide real paths and are a top signoff escape vector.

Metric: false path count, multicycle path audit rate, exception waiver backlog