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Course contents

  • How to Use This Course
  • Reading Path
  • STA Glossary
  • STA Metrics Reference
  • STA Mastery Cheatsheet
  • Timing Paths and Checks16
  • Constraints & SDC Fundamentals20
    • Clock Definition & Uncertainty
    • Generated Clocks & Dividers
    • I/O Timing & Boundary Contracts
    • Exceptions & Audit Policy
      • False Paths
      • Multicycle Paths
      • Min and Max Delay Exceptions
      • Exception Audit
    • Environment and Design Rules
  • Delay Graph & Path Analysis16
  • Beyond Setup and Hold16
  • Multi-Corner Multi-Mode Signoff16
  • OCV, AOCV, POCV and Variation16
  • Crosstalk and Noise16
  • ECO and Closure16
  • STA Debug Playbook16
  • STA Interview Prep26
  • Capstone Timing Signoff Lab4
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‹Exceptions & Audit Policy
  1. Topics
  2. Static Timing Analysis
  3. Constraints & SDC Fundamentals
  4. Exceptions & Audit Policy
  5. False Paths

Part 2 · Constraints and SDC · All levels

False Paths

set_false_path removes the timing check between the named points; it is justified only when no real data transfer uses that path.

On this page

    Why it matters

    A path that exists structurally but can never carry a meaningful transfer would otherwise generate violations that cost effort and sometimes area. A false path removes it. But removing a check is a statement about the design, and if the statement is wrong the chip can fail in silicon with a clean report.

    The command and its scope

    Diagram
    # not-run: SDC is not executable here
    set_false_path -from [get_clocks clk_a] -to [get_clocks clk_b]      ;# clock to clock (needs a reason)
    set_false_path -from [get_ports test_mode] -to [all_registers -data_pins]   ;# static signal
    set_false_path -through [get_pins mux/I1] -from [get_clocks clk_a]  ;# a path never selected
    set_false_path -hold -from [get_clocks clk_a] -to [get_clocks clk_b]         ;# hold-only removal (setup still checked)

    Justification

    Evidence required

    Static during operation (mode, test pins)

    Proof the signal is constant when the capture path is active (and constant constraints via case analysis if possible)

    Mutually exclusive functions

    Logic proof: the select combination cannot occur

    Asynchronous clocks

    A verified CDC protocol on every crossing, not just the removed check

    Reset asserted asynchronously with synchronised deassertion, or a quasi-static reset

    The synchroniser (or proof the reset is static in operation) identified, with recovery/removal checks kept where they apply

    example.py
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    # Scope check: how many endpoints does a broad false path silence?
    all_paths = [("a", "x"), ("a", "y"), ("b", "x"), ("b", "y"), ("c", "z")]
    # intended: only the real false path from b to y
    intended = {("b", "y")}
    # written: from {b} to all endpoints (too broad)
    written = {p for p in all_paths if p[0] == "b"}
    extra = written - intended
    assert intended <= written and extra == {("b", "x")}
    print("PASS: the exception also silences", sorted(extra), "which is a real path")

    The exception was meant for one path but, written from b to everything, it also removes (b, x). That is the typical overbreadth: a -from without a matching -to. Review exceptions by listing the paths they cover and comparing with the intent.

    What the review looks for

    • Each false path has a written reason and an owner; "it was failing" is not a reason.

    • Exceptions are as narrow as possible (through points and specific pins), never from a clock to all endpoints without cause.

    • A bare set_false_path applies to both setup and hold; use -setup or -hold when only one check should be removed.

    Common pitfall

    Using set_false_path to make a crossing pass. For asynchronous crossings the check is replaced by CDC verification, which must exist; a false path with no CDC proof is a hidden defect.

    Interview

    State that set_false_path disables both setup and hold, and name two legitimate uses (static configuration, exclusive modes).

    Check yourself A path fails setup by 0.2 ns. A colleague proposes a false path. What do you ask?

    Whether the path can ever carry a real transfer in operation, with evidence. If it can, a false path hides a real failure and the design needs a fix; if it cannot, the justification must be written and reviewed.

    Related topics

    • Next: Multicycle Paths

    • RTL: Multi-Cycle and False Paths

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    See also

    • Min and Max Delay Exceptions
    • Exception Audit