Root cause

A snippet written for a project where two clocks were asynchronous was imported without checking the relationship in this design. It removed 1,120 related paths from analysis, hiding three violations, one of which failed in silicon. The error is a process one as much as a technical one: nothing in the flow asked how many paths the exception covered or whether the clocks were related.

Fix, in order

1
2
3
4
5
6
7
8
9
10
11

# After step 1 and 2: the three violations are fixed with a shared-segment change that removes 0.08 ns of delay on their common cell (a speed-up).
before = {"q1": -0.050, "q2": -0.018, "q3": -0.004}
gain = 0.080
after = {k: round(v + gain, 3) for k, v in before.items()}
assert after == {"q1": 0.03, "q2": 0.062, "q3": 0.076}
assert all(v > 0 for v in after.values())
# the process gate: any exception covering more than ten times the expected path count must be reviewed
expected, covered = 2, 1120
gate = covered > 10 * expected
assert gate is True
print("PASS: slacks after the fix", after, "; coverage gate triggers:", gate)

A single shared-cell fix that removes 80 ps of delay on their common cell (a speed-up) clears all three violations. The process fix matters more: the coverage gate (any exception covering more than ten times the expected number of paths gets a mandatory review) would have fired on the day the snippet was merged, since 1,120 is 560 times the expected two. Silicon failures from constraints are found cheaply by a gate and expensively by a bring-up.

Related topics

• Investigation

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