A scan flop is a 2-to-1 mux feeding a flop. In normal mode the mux passes functional data, and in shift mode it passes the previous chain bit.
The mux sits on the data input, never on the clock. The clock path stays untouched so shift and function share one timing reference.
Pin | Role |
|---|---|
D | Functional data, selected when scan enable is low. |
SI | Scan data from the previous flop, selected when scan enable is high. |
SE | Scan enable: the mux select, low for capture and high for shift. |
Q / SO | Flop output, feeding logic in capture and the next flop in shift. |
A test runs in three steps: shift a pattern in with SE high, pulse one functional clock with SE low to capture responses, then shift the responses out. Unloading one pattern can overlap with loading the next.
Phase | SE | What happens |
|---|---|---|
Load | High | Each shift clock moves one bit down the chain. |
Capture | Low | One functional clock stores each flop's logic response. |
Unload | High | Shift clocks move captured bits to the scan-out pin. |
The calc block runs one chain end to end. Twelve flops need twelve cycles each way plus one capture.
one chain of 12 flops, one pattern, no load-unload overlap
load = 12 shift cycles
capture = 1 functional cycle
unload = 12 shift cycles
per pattern = 12 + 1 + 12 = 25 cycles
EXAMPLE shift clock 25 MHz -> period 40 ns (stated example parameter)
test time = 25 x 40 ns = 1000 ns = 1.0 usTest mode holds the chip in a configuration where scan works: scan clocks run and asynchronous controls come from pins. SE switches between shift and capture and stays stable across each phase, with setup and hold to the shift clock.
Full scan makes every flop a shift position, so any state can be loaded and read back. Pattern generation then treats sequential logic as combinational between scan flops, at concept level with no coverage numbers claimed here.
A ten-bit pattern shifted in, then one capture pulse stored the logic responses. The chain now holds test results ready to shift out.
Gating the clock risks runt pulses and skew. A mux on data keeps one clean clock for both shift and capture.