Each register-to-register path starts at a launch edge and ends at a capture edge. The launch flop adds its clock-to-Q delay before the combinational logic begins.
Setup is checked against the next capture edge, one period later. Hold is checked against the same capture edge, at zero cycles delay.
Check | Capture edge | Depends on the period | Typical fix |
|---|---|---|---|
Setup | Next edge (one period later) | Yes: a faster clock tightens it. | Shorten the path or slow the clock. |
Hold | Same edge (zero cycles later) | No: the period cancels out. | Add delay (buffering); never slow the clock. |
The setup check asks whether the latest arrival beats the next edge minus setup time. Slow paths and short periods fail it.
The hold check asks whether the earliest arrival stays past the same edge plus hold time. Fast paths race it, and the clock period cannot help.
Take an EXAMPLE 5.00 ns clock with clock-to-Q of 0.30 ns and setup of 0.50 ns. The slowest combinational path is 3.80 ns and the fastest is 0.35 ns, with a hold time of 0.10 ns.
EXAMPLE parameters (not real library values): period 5.00 ns, clock-to-Q 0.30 ns, setup 0.50 ns, hold 0.10 ns
setup: slowest arrival = 0.30 + 3.80 = 4.10 ns
setup required = 5.00 - 0.50 = 4.50 ns
setup slack = 4.50 - 4.10 = +0.40 ns -> meets
hold: fastest arrival = 0.30 + 0.35 = 0.65 ns
hold required = 0.10 ns
hold slack = 0.65 - 0.10 = +0.55 ns -> meetsSetup slack grows by 1.00 ns through the required time. Hold slack is unchanged.
+0.55 ns. The data stays 0.55 ns past the earliest it may change.