assign and complete always @*

Gates and multiplexers, per the expression

$and, $or, $mux, ...

if with else, full case

Multiplexer

$mux

if without else, case without default, in a combinational block

Latch

$dlatch

Same shapes in a clocked block

Flop with enable

$dff

always @(posedge clk)

Flip-flop per bit

$dff

Output driven to 1'bz

Tri-state driver at pins

Tri-state buffer

for loop with fixed bounds

Repeated hardware, one copy per iteration

Unrolled gates

Combinational Blocks Infer Logic

Complete assignment in combinational blocks, proved with the tool.

Priority Chains versus Parallel Selects

If chains, parallel case selects, and their depth and area.

Latch Inference from Incomplete Assignment

The missing-else latch, its fixes, and a latch-against-mux proof.

Flops, Tri-States and Unrolled Loops

Clocked blocks, pin tri-states, unrolled loops, and a calculator.

What Is Not Synthesizable

Delays, testbench blocks, and types with no hardware mapping.