Runtime Sub-Phase Debug: Stalled Phases and Group Transitions

Symptom: simulation stuck in a runtime sub-phase

When a runtime sub-phase hangs, the simulation appears frozen at a specific sim time — not at timeout (unless global timeout fires), but with no forward progress. The cause is always an undropped objection in the current sub-phase.

[PHASE][RUN] stuck sub-phase signature

  sim time frozen (e.g., stuck at 1500ns)
  no extract_phase activity
  +UVM_OBJECTION_TRACE shows count > 0 for CURRENT sub-phase
  last phase transition visible in trace

  example: stuck in configure_phase, count=1, agent_x env "register config"

• Identify WHICH sub-phase is stuck — trace shows current phase name.

• Only the stuck sub-phase's objections matter — other phases already completed.

• Global timeout eventually fires if no watchdog is present.

Tool: phase transition logging

# Enable phase trace (shows phase transitions)
simv +UVM_PHASE_TRACE +UVM_OBJECTION_TRACE +UVM_VERBOSITY=UVM_HIGH

# Grep for phase boundaries
grep -E "PHASE|OBJTN" sim.log | tail -80

[PHASE][UVM] phase trace reading

  *** PHASE START: reset_phase ***
  OBJTN RAISE agent_a "idle during reset"  count=1
  OBJTN RAISE agent_b "idle during reset"  count=2
  OBJTN DROP  agent_a "reset released"     count=1
  OBJTN DROP  agent_b "reset released"     count=0
  *** PHASE END: reset_phase ***
  *** PHASE START: post_reset_phase ***
  ...
  *** PHASE START: configure_phase ***
  OBJTN RAISE env "register config"        count=1
  ... STUCK — no DROP, no PHASE END ...

• +UVM_PHASE_TRACE shows phase start/end boundaries.

• Combine with +UVM_OBJECTION_TRACE to see who blocks each phase.

• Last PHASE START without matching PHASE END identifies the stuck phase.

Common sub-phase failure modes

reset_phase stuck

• Waiting for reset signal that never deasserts — check RTL or testbench reset driver.

• Clock not running — wait(posedge clk) never fires.

• Objection raised but reset wait is blocking forever — add timeout.

configure_phase stuck

• RAL frontdoor sequence hung on bus — bus not ready after reset.

• Adapter/sequencer not connected — sequence blocks on get_next_item.

• Objection raised but reg_cfg_seq body has infinite loop or missing drop.

main_phase stuck

• Driver forever loop with no stop — expected, but test must drop its objection.

• Sequence body hung — same as run_phase debug patterns.

• default_sequence raised objection but body never completes.

shutdown_phase stuck

• inflight_count never reaches zero — transaction stuck on bus.

• Waiting for event that was never triggered by post_main.

• Monitor pipeline_empty never true — monitor still processing.

// Sub-phase watchdog pattern
task configure_phase(uvm_phase phase);
  fork
    begin
      phase.raise_objection(this, "register config");
      run_config();
      phase.drop_objection(this, "register config done");
    end
    begin
      #(cfg.cfg_timeout_ns);
      `uvm_error("CFG_WD", $sformatf("configure_phase timeout:\n%s",
                  phase.phase_done.convert2string()))
    end
  join_any
  disable fork;
endtask

Group transition debug checklist

1. Enable +UVM_PHASE_TRACE + +UVM_OBJECTION_TRACE.

2. Find last PHASE START without PHASE END — that's the stuck phase.

3. Check objection trace for unmatched RAISE in that phase.

4. Inspect that component's phase task for infinite wait or missing drop.

5. Verify previous group completed — if reset stuck, configure never starts.

6. Check clock/reset signals at stuck time — frozen wait conditions.

7. For configure: verify bus connectivity and RAL adapter wiring.

8. For shutdown: check inflight counters and stop event propagation.

9. Add per-phase watchdog with convert2string for precise diagnosis.

[PHASE][RUN] debug triage by group

  stuck in reset group?     → check reset signals, clock, idle drive
  stuck in configure group? → check RAL/bus, adapter, reg sequence
  stuck in main group?      → check sequence/driver, test objection
  stuck in shutdown group?  → check inflight drain, stop event

Key takeaways

• Stuck runtime sub-phase = undropped objection in that specific phase.

• +UVM_PHASE_TRACE shows which phase is active; objection trace shows who blocks.

• Each group has characteristic failure modes — reset waits, RAL hangs, drain stalls.

• Per-phase watchdogs with convert2string pinpoint the stuck component quickly.

Common pitfalls

• Debugging as run_phase hang when actual stuck phase is configure or shutdown.

• Adding global timeout instead of finding the specific sub-phase objector.

• Fixing reset_phase but not verifying configure_phase starts afterward.

• Infinite wait in sub-phase without timeout — sim hangs with no diagnostic.