The Synchronization Problem: Many Authors, One Timeline

Distributed testbench reality

Modern SoC verification combines multiple VIPs, models, and checkers from different teams. No single author sees the full wiring graph. Every integrator must answer the same temporal questions:

1. When may this component create its children?

2. When may it connect to a neighbor that might not exist yet?

3. When may it drive pins relative to reset, clocking, and other agents?

4. When may simulation end without cutting off in-flight transactions?

[UVM][PHASE] synchronization axes

STRUCTURAL sync:
  all endpoints exist before connect
  hierarchy complete before elaboration checks

BEHAVIORAL sync:
  reset/configure/main ordering at run-time
  parallel agents start together

COMPLETION sync:
  stimulus drained before extract/check
  no magic #delay end conditions

Without a shared contract, each integrator invents a private initial block ordering — and every new VIP insertion re-audits the entire script.

Key takeaways

• Integration is a synchronization problem, not just a wiring problem.

• Three axes — structural, behavioral, completion — map directly to phase groups.

• Ad-hoc ordering does not scale past a handful of components.

Common pitfalls

• Documenting wiring diagrams but not temporal dependencies.

• Assuming run-time fork/join in top replaces phase-level guarantees.

• Treating completion as a fixed timeout instead of a quiescence contract.

The hidden cost of manual coordination

Manual ordering looks fine in a demo testbench. At production scale it becomes a regression tax: ordering bugs reproduce intermittently, depend on compile order, or appear only when one VIP updates.

Symptoms integrators recognize

• Null handle in connect because create order differed between two scenarios.

• Stimulus starts before reset deasserts because fork order changed.

• Simulation ends while sequences still have items in flight.

• New passive agent addition breaks an unrelated active agent connect.

[PHASE] failure signature map

null in connect_phase:
  -> structural sync broken (build/connect placement)

activity at time 0 surprises:
  -> behavioral sync broken (run vs reset ordering)

instant $finish / hang forever:
  -> completion sync broken (no real done signal)

// Integrator script grows without phases
initial begin
  build_axi();
  build_apb();
  build_mem();
  connect_axi_to_scoreboard();  // mem model not ready yet?
  connect_apb_to_scoreboard();
  fork
    run_axi();
    run_apb();
    run_mem();
  join_none
  #50us; // hope everything finished
  $finish;
end

// Every new VIP -> re-read and re-order this block

Key takeaways

• Manual scripts centralize knowledge that should live in reusable components.

• Ordering bugs cluster around connect timing, run start, and simulation end.

• Phases move temporal policy from integrator scripts into the library.

Common pitfalls

• Copy/pasting a working initial block as the 'standard' for all projects.

• Fixing null connects with defensive null checks instead of correct build order.

• Using longer timeouts to mask incomplete stimulus instead of real completion.