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Course contents

  • Architecture Metrics Reference
  • Workload Taxonomy for Architects
  • Architecture Glossary
  • Computer Architecture Cheatsheet
  • Pipeline Fundamentals14
  • Memory Hierarchy15
    • Caches
    • Memory Bandwidth and Latency
      • Peak, Protocol and Workload Bandwidth
      • Little's Law, MLP and the Waterfall
      • Row Buffers and Controller Scheduling
      • Prefetch Accuracy, Coverage and Pollution
      • Counters, QoS and Debug
    • Virtual Memory and the TLB
  • NoC and Interconnect Architecture6
  • Coherency and Memory Ordering9
  • Performance Analysis9
  • Accelerator Architectures6
  • SoC Architecture Tradeoffs9
  • Architecture Interview Prep14
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‹Memory Bandwidth and Latency
  1. Topics
  2. Computer Architecture
  3. Memory Hierarchy
  4. Memory Bandwidth and Latency
  5. Counters, QoS and Debug

Computer Architecture · All levels

Counters, QoS and Debug

Counter methodology, queue-latency triage and fair write-drain tuning.

On this page

    Count bytes, not beats

    Bandwidth counters must agree on definitions before any comparison. Beats times bytes per beat is bandwidth; valid toggles alone are not.

    Warm up caches, fix the sampling window across hops, and keep coherency and prefetch bytes visible instead of folding them into demand.

    Rule

    Practice

    Why

    Bytes, not beats

    Multiply beats by bytes per beat

    Narrow beats inflate toggle counts

    Same window

    Synchronized start and stop at every hop

    Skewed windows fake loss or gain

    Warmup excluded

    Drop the first N transactions

    Cold caches distort steady state

    Split traffic classes

    Demand, prefetch and snoop bytes apart

    Pollution hides inside totals

    First saturated queue

    Walk the hierarchy in order and stop at the first queue whose latency rises with demand. Everything downstream of it is starved, not broken.

    1. Build the per-hop waterfall under one synchronized window.

    2. Plot queue latency against offered load at each hop and mark the knee.

    3. Name the first hop past its knee as the bottleneck.

    4. Confirm with the Little check: needed outstanding above depth proves saturation.

    5. Fix that hop only, then re-measure the whole path.

    Tuning with guards

    Write-drain threshold trades read blockage against turnaround cost. Sweep it with latency guards, and accept only settings that hold the tail.

    Drain threshold

    Sustained (GB/s)

    p99 read (ns)

    Verdict

    Drain at 8

    112

    180

    Reads safe, turnarounds heavy

    Drain at 32

    118

    210

    Accept: best bytes under 250 ns guard

    Drain at 128

    121

    320

    Reject: breaks the 250 ns guard

    The sweep above is illustrative for a 70 percent read and 30 percent write mix. QoS needs the same guards: read bursts go first, but aging or weighted shares stop starvation, and p95/p99 plus starvation counters prove it.

    Common mistakes

    Common pitfall

    Tuning the write drain for peak gigabytes per second while ignoring p99 regresses interactive latency. Every throughput claim ships with its tail-latency guard result.

    Interview

    Likely probe: how do you validate a NoC QoS change for memory traffic? Answer: throughput plus p95/p99 and fairness across mixed read, write and tenant classes, never average bandwidth alone.

    Check yourself The waterfall shows loss at both the NoC and the controller. Which do you fix first?

    The NoC, if it is first past its knee. The controller may simply be starved by it.

    Check yourself A drain-at-128 setting wins on gigabytes per second but posts p99 of 320 ns against a 250 ns guard. Ship it?

    No. The guard decides, so drain-at-32 at 118 GB/s and 210 ns is the accepted point.

    Related topics

    • On-chip networks

    • Performance method

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    See also

    • Peak, Protocol and Workload Bandwidth
    • Little's Law, MLP and the Waterfall
    • Row Buffers and Controller Scheduling