Skip to content
DenseChip
Learn
PracticeCode labInterview

DenseChip

Navigate

Menu

LearnPracticeCode labInterview

Tools

All toolsSV editorCode repoResume
DenseChip

Practice, courses, and chip-design tools in one focused workspace.

LearnPracticeCode labInterviewToolsLearning paths

© 2026 DenseChip

AboutContactPrivacyTerms
Skip to lesson

Course contents

  • Architecture Metrics Reference
  • Workload Taxonomy for Architects
  • Architecture Glossary
  • Computer Architecture Cheatsheet
  • Pipeline Fundamentals14
    • Pipeline Throughput
    • Branch Prediction and Fetch
      • Predictor Structures
      • MPKI and Recovery Math
      • Fetch and Recovery Pipeline
      • Tuning, Cost and Interviews
    • Out-of-Order Superscalar Execution
  • Memory Hierarchy15
  • NoC and Interconnect Architecture6
  • Coherency and Memory Ordering9
  • Performance Analysis9
  • Accelerator Architectures6
  • SoC Architecture Tradeoffs9
  • Architecture Interview Prep14
Loading lesson

‹Branch Prediction and Fetch
  1. Topics
  2. Computer Architecture
  3. Pipeline Fundamentals
  4. Branch Prediction and Fetch
  5. Tuning, Cost and Interviews

Computer Architecture · All levels

Tuning, Cost and Interviews

Branch-type debug, predictor cost math, ROI, and interview drills.

On this page

    Debug playbook

    Start from phase consistency, then split by branch type. Conditional, indirect, return and loop branches fail for different reasons and need different fixes.

    • Confirm the MPKI shift holds across phases and is not a warm-up artifact.

    • Break down mispredicts by branch type: conditional, indirect, return, loop.

    • Correlate recovery cycles with the resolution stage and squash fanout delay.

    • Inspect fetch bandwidth saturation for hidden front-end bottlenecks.

    • Validate predictor update behavior after context switches and interrupts.

    Context switches deserve their own check. A flushed or aliased history relearns from cold, so OS-like traces must confirm the steady-state gain survives.

    Cost per prediction

    Storage follows directly from stated sizes. A 4K-entry bimodal table of 2-bit counters is 8192 bits, exactly 1 KiB.

    Structure (stated size)

    Storage math

    Notes

    Bimodal 4K entries

    4096 x 2 bits = 8192 bits = 1 KiB

    One read per prediction

    Gshare 4K entries, 12-bit history

    1 KiB table plus one 12-bit register

    History warms up after phase change

    TAGE sketch: base plus 3 tagged 1K tables

    1 KiB + 3 x 1024 x 14 bits = 6.25 KiB

    14 bits = 9 tag + 3 counter + 2 useful

    BTB 1K entries

    1024 x 53 bits = 6.625 KiB

    53 bits = 1 valid + 20 tag + 32 target

    Return stack 32 deep

    32 x 32 bits = 128 B

    Underflow falls back to BTB

    ROI of a better predictor

    Rank experiments by MPKI impact per unit cost, then test on branch-sensitive workloads. Report IPC and latency uplift minus area, power and timing cost, never predictor metrics alone.

    Diagram
    Second case: mispredict rate 6.4 -> 5.1 percent, 120 branches per 1000 instr,
    penalty 11.4 -> 13.0 cycles after resolution moved deeper
    MPKI before: 0.064 x 120 = 7.68
    MPKI after:  0.051 x 120 = 6.12
    CPI before: 7.68 x 11.4 / 1000 = 87.552 / 1000 = 0.0876 (about 0.088)
    CPI after:  6.12 x 13.0 / 1000 = 79.56 / 1000 = 0.0796 (about 0.080)
    Saving: 0.087552 - 0.07956 = 0.007992 (about 0.008)
    Expected CPI: 0.7874 - 0.0080 = 0.7794 (about 0.779), so IPC 1 / 0.7794 = 1.28
    Observed IPC 1.27 -> 1.28 matches: the rate win was spent on deeper recovery.

    Interview drills

    Six drills cover this topic end to end. Each answer names the metric first, then the mechanism.

    • MPKI versus accuracy: MPKI normalizes by instruction volume, so it ties misses to CPI directly.

    • Better predictor, same IPC: fetch bandwidth or recovery refill dominates, so fewer misses add no issue rate.

    • ROI story: IPC uplift on target workloads minus area, power and timing cost of the change.

    • Wrong-path uops: they drain issue and ROB capacity even when accuracy looks fine.

    • Recovery severity: average and percentile recovery cycles times mispredict frequency.

    • Experiment order: rank by MPKI per cost on branch-sensitive workload classes first.

    Common pitfall

    Synthetic branch tests flatter predictors that production footprints then break. Sign off only on representative traces with OS-like context switches included.

    Interview

    The ROI answer wins offers: end-to-end IPC and latency on target workloads, minus the area, power and timing bill. Predictor metrics alone never close the discussion.

    Check yourself Why is MPKI often more actionable than accuracy percent?

    MPKI normalizes misses by instruction volume, tying predictor behavior to CPI through MPKI times penalty over 1000. Accuracy ignores how often branches appear.

    Check yourself A bigger predictor raises accuracy but breaks fetch timing. What is the verdict?

    Negative ROI unless fetch is rebudgeted. A lookup that misses the fetch clock costs more cycles than the accuracy saves.

    Check yourself How do you quantify branch recovery severity?

    Multiply average and percentile recovery cycles by mispredict frequency. Frequency without penalty, or penalty without frequency, both mislead.

    Related topics

    • Roofline and tuning

    • Caches

    Previous

    13 / 86

    Next: Out-of-Order Superscalar Execution

    Up next

    Up nextOut-of-Order Superscalar Execution

    Sign in to save progress

    Practice this lessonReport an error

    See also

    • Predictor Structures
    • MPKI and Recovery Math