A chain of dependent instructions issues one step per producer latency. No width or scheduling shortens the chain itself.
A pointer chase is the extreme case. With each load feeding the next address, the chain runs at memory latency per step: one dependent load every 10 cycles sustains at most 0.1 IPC from that chain, stated parameters.
A load miss stalls its dependents for the full miss latency. Overlapping misses and non-blocking caches hide some of it, but the floor stays.
Wider issue helps only while independent misses overlap. Once the miss handlers or bandwidth saturate, extra slots wait on the same memory system.
A mispredict flushes the speculative window and refills it from the correct path. The cost is the mispredict rate times the resolution depth in cycles.
Deeper speculation windows lose more per mispredict. That is why branch behavior caps the useful window, covered in the branch prediction topic.
A CPI stack splits every cycle into useful work plus stall classes. Its percentages must sum to 100, up to stated rounding.
The example below uses stated parameters, not measured data.
4-wide core, stated cycle breakdown (shares sum to 100 percent)
useful issue ......... 30 percent
data-dependency stall 25 percent
branch waste ......... 15 percent
memory stall ......... 30 percent
check: 30 + 25 + 15 + 30 = 100
sustained IPC = width x useful share = 4 x 0.30 = 1.2
at 3 GHz: throughput = 1.2 x 3.0 GHz = 3.6 GIPSLimiter | Signature in counters | Design direction |
|---|---|---|
True dependencies | High RAW stall share, idle slots behind chains | Larger window, better scheduling, lower producer latency |
Memory latency | Load-miss replay and queue-full stalls | Prefetch, locality, more outstanding misses |
Branch mispredicts | Flush events tracking MPKI | Better prediction, shorter resolution depth |
IPC is 1.2. Doubling width at the same share gives 2.4, but in practice the share usually falls as the window and memory pressure grow.
Branches were not the binding limiter. The next experiment targets memory behavior, not the predictor.