A common cold-boot sequence is reset DRAM → program mode registers → run the PHY's required training → verify results → enable normal controller traffic. The exact order, retry and fallback behaviour are platform contracts, not universal properties of every memory generation.
Where the platform's security and diagnostic policy permits, retain training results or summaries for field comparison. A trend can identify an operating-condition or margin change, but does not by itself identify whether the cause is silicon, package, board, power or configuration.
Cold boot vs warm boot may show different margins — test both.
Package change invalidates prior training assumptions.
Board vendor swap can change trace lengths and margins.