Pitfalls and red flags

Pitfalls & Red Flags for Protocol Waveform Debug focuses on debug turnaround time, root-cause classification, rerun pass rate. The goal is to connect the observable symptom to protocol mechanism, ownership, and regression risk.

• A channel looks idle, but upstream credit or ready behavior is the actual blocker.

• The spec allows behavior that the local scoreboard assumed was illegal.

• A bridge changes width, ID, burst shape, or ordering attributes silently.

• Reset releases one side of the interface earlier than the other.

• The fix improves a directed test but regresses real mixed traffic.

Layer responsibility check

LAYER RESPONSIBILITY — Protocol Waveform Debug

layer          owns                         common failure
-----------    --------------------------   -----------------------
software       intent, ordering needs       wrong assumption
transaction    id/addr/len/attributes       ordering / outstanding
link/channel   handshake, credits, retry    backpressure / deadlock
physical       clock/reset/lanes/PHY        timing / training / SI
observability  waveform/log/counter         missing evidence

Protocol deep dive

Verification closes the gap between 'works in directed test' and 'legal under all stressed traffic'.

Concept diagram

VERIFICATION CLOSURE LOOP

spec clause -> test -> assertion -> coverage -> waiver -> signoff
                  ^                           |
                  +--------- gap found --------+

Metric graph

COVERAGE vs ESCAPE RATE

escapes
  |*
  | *
  |  *
  |   **  <- knee: more random helps
  |     ****
  +----------------> constrained-random depth

Metrics and artifacts to collect

• compliance pass rate

• coverage closure

• scoreboard mismatch rate

• assertion fire count

• waiver log

Mini case study

Block passed VIP compliance but chip failed: system test omitted cross-master ID reuse through a bridge. Scoreboard key did not include upstream port ID.

Debug branches

• If VIP pass but silicon fail, check integration assumptions.

• If scoreboard noisy, fix key (ID+port+addr).

• If coverage plateau, add compliance gap analysis not more repeats.

Senior review question

Ask: what is the first transaction that deviates, and which spec rule does it test?

Key takeaways

• Connect every protocol claim to a transaction identity and measurable metric.

• Store the artifact (waveform, log, counter) next to every signoff decision.

Common pitfalls

• Debugging timeouts without finding the first bad transaction.

• Quoting peak bus width without payload efficiency and retry overhead.

• Treating VIP compliance as a substitute for system integration replay.

Principal review addendum

Re-read Protocol Waveform Debug against one concrete product workload, not a synthetic directed test.

waveform debug reconstructs transaction intent from signals, monitors, logs, and spec rules in timestamp order.