Protocol Waveform Debug: Step-by-Step Walkthrough

Step-by-step analysis walkthrough

Follow this when you own Protocol Waveform Debug in a protocol review or bring-up war room.

1. State expected transaction in plain language (who initiates, what completes).

2. Draw layer stack and mark clock/reset boundaries.

3. List channels: request, data, response, snoop, credit, or lane.

4. Tag ID/address/endpoint on the failing run.

5. Find first cycle where progress stops or semantics change.

6. Check bridge: width, ID remap, burst, ordering attributes.

7. Check flow control: ready, credit, FIFO, link state.

8. Check firmware/register mode vs hardware capability.

9. Build minimal replay; confirm legal vs illegal per spec.

10. Estimate metric delta from proposed fix.

11. Run compliance + product traffic regression matrix.

12. Write signoff memo with owners and artifacts attached.

Artifacts to collect

• annotated waveform, transaction timeline, root-cause note

• VIP transaction log

• Waveform with annotations

• Spec clause reference

• Regression manifest

Decision memo template

PROTOCOL DECISION MEMO — Protocol Waveform Debug
metric:
transaction id:
layer:
hypothesis:
experiment:
fix:
validation:
owners: debug lead, verification owner, RTL owner

Reference visuals

Waveform debug reconstruction

RECONSTRUCT INTENT FROM SIGNALS

step 1: find first anomaly timestamp (T0)
step 2: scroll BACK to the request that started it
step 3: annotate id/addr on every related signal
step 4: mark where progress should have happened but did not
step 5: compare with the spec timing for that exact transaction

T-2   T-1   T0(bad)   T+1
 |     |      |         |
req  grant  (no resp)  timeout
        ^ root cause lives here, not at the timeout

Protocol deep dive

Verification closes the gap between 'works in directed test' and 'legal under all stressed traffic'.

Concept diagram

VERIFICATION CLOSURE LOOP

spec clause -> test -> assertion -> coverage -> waiver -> signoff
                  ^                           |
                  +--------- gap found --------+

Metric graph

COVERAGE vs ESCAPE RATE

escapes
  |*
  | *
  |  *
  |   **  <- knee: more random helps
  |     ****
  +----------------> constrained-random depth

Metrics and artifacts to collect

• compliance pass rate

• coverage closure

• scoreboard mismatch rate

• assertion fire count

• waiver log

Mini case study

Block passed VIP compliance but chip failed: system test omitted cross-master ID reuse through a bridge. Scoreboard key did not include upstream port ID.

Debug branches

• If VIP pass but silicon fail, check integration assumptions.

• If scoreboard noisy, fix key (ID+port+addr).

• If coverage plateau, add compliance gap analysis not more repeats.

Senior review question

Ask: what is the first transaction that deviates, and which spec rule does it test?

Key takeaways

• Connect every protocol claim to a transaction identity and measurable metric.

• Store the artifact (waveform, log, counter) next to every signoff decision.

Common pitfalls

• Debugging timeouts without finding the first bad transaction.

• Quoting peak bus width without payload efficiency and retry overhead.

• Treating VIP compliance as a substitute for system integration replay.

Principal review addendum

Re-read Protocol Waveform Debug against one concrete product workload, not a synthetic directed test.

waveform debug reconstructs transaction intent from signals, monitors, logs, and spec rules in timestamp order.