A timing run is only as meaningful as its clocks. A missing clock leaves flops unconstrained. A clock defined at the wrong point times the wrong network. A clock defined twice on the same net can double-count checks. Getting create_clock right is the base of everything.
# not-run: SDC is not executable here
create_clock -name sys_clk -period 2.0 [get_ports clk_in]
# period 2.0 ns, default waveform {0 1.0}: rise at 0, fall at half periodPart | Meaning | Common mistake |
|---|---|---|
-name | A name used to refer to the clock in other constraints | Omitting it on a pin-defined clock, which then takes the pin name |
-period | The clock period in the library time unit (check the unit) | Mixing ns and ps |
Source object (port or pin) | Where the clock enters the analysis; it propagates from there through buffers, inverters and combinational gates | Defining on a pin after a divider without a generated clock definition |
-waveform {rise fall} | Edge times within one period (default is a 50% duty cycle starting at 0) | Forgetting an offset or duty cycle in a non-standard clock |
The clock propagates forward through combinational cells (buffers, inverters, gates) and through wires to the clock pins of sequential cells.
It does not propagate through a flop's clock-to-Q arc. A flop output that clocks other flops needs a generated clock definition.
A sequential cell's clock pin is a clocked pin only if some clock reaches it; the report lists pins with no clock.
# Period and frequency sanity: the unit trap.
period_ns = 2.0
freq_mhz = 1000.0 / period_ns
assert freq_mhz == 500.0
# if the library time unit is ps, "-period 2.0" would mean 2 ps (500 GHz): a typo-scale error
assert 1e6 / 2.0 == 500000.0 # MHz for a 2 ps period
print("PASS: 2.0 ns = 500 MHz; the same number in ps would be 500000 MHz")The check shows how a unit mix-up changes the frequency by a factor of a thousand while still looking like a valid constraint. Always confirm the time unit in the library or with a unit command before trusting a period.
No. The clock does not propagate through the divider flop's clock-to-Q arc, so those 200 flops have no clock. The divider output needs a create_generated_clock definition.