A signoff tool that is occasionally optimistic would pass chips that fail. So STA is built to err toward failure: it assumes the worst when it cannot know better. That is correct for safety and expensive for performance. An engineer who understands each source of pessimism can tell the difference between a real violation and one that disappears when the pessimism is removed correctly.
Source | What STA assumes | Removable by |
|---|---|---|
All paths are real | Every structural path can toggle | Justified false paths and constants |
Worst-case corners | The delay-maximising corner for setup, the delay-minimising corner for hold | Nothing: this is the intent; use the right corners (see the MMMC section) |
Variation derates | Launch and capture paths see opposite extremes of variation | Common path pessimism removal for the shared part; statistical methods |
Simultaneous worst case | Every cell on the path is at its worst at once | Statistical or depth-based derating |
Coupling | Aggressors switch in the worst direction at the worst time | Timing windows that show aggressors cannot overlap |
Margin | Uncertainty added for jitter and unknowns | Better estimates as the design matures |
Consider launch and capture flops fed by the same clock tree. They share the first 0.8 ns of the clock path. If STA derates the launch path late and the capture path early, it applies those opposite derates even to the shared 0.8 ns, which cannot physically be both. That is pure pessimism, and the common-path lesson shows how it is removed.
# Pessimism on a shared clock segment when launch is derated late and capture early.
shared = 0.80 # ns of clock path common to launch and capture
late, early = 1.05, 0.95 # illustrative derates
launch_shared = shared * late # 0.84
capture_shared = shared * early # 0.76
pessimism = launch_shared - capture_shared
assert abs(pessimism - 0.08) < 1e-9
print("PASS: removable pessimism on the shared segment =", round(pessimism, 3), "ns")A violation that is small compared with a known pessimism source is investigated for that source before any RTL or ECO change.
Pessimism removal uses a documented, standard method; it is never replaced by adding positive margin by hand.
Corners and derates are chosen to model real silicon, not to make the report green.
Not on its own. Uncertainty represents real jitter and estimation error; reducing it to pass a path is lowering the margin, not removing pessimism. Change it only if you have evidence the original value was too large for this design stage, and say so in the review.