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Course contents

  • How to Use This Course
  • Reading Path
  • STA Glossary
  • STA Metrics Reference
  • STA Mastery Cheatsheet
  • Timing Paths and Checks16
    • What STA Checks
      • STA Versus Simulation
      • The Timing Graph
      • Path Types and Endpoints
      • Why STA Is Pessimistic by Design
    • Setup and Hold Checks
    • Clocks in Timing Analysis
    • Delay Models
  • Constraints & SDC Fundamentals20
  • Delay Graph & Path Analysis16
  • Beyond Setup and Hold16
  • Multi-Corner Multi-Mode Signoff16
  • OCV, AOCV, POCV and Variation16
  • Crosstalk and Noise16
  • ECO and Closure16
  • STA Debug Playbook16
  • STA Interview Prep26
  • Capstone Timing Signoff Lab4
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‹Timing Paths and Checks
  1. Topics
  2. Static Timing Analysis
  3. Timing Paths and Checks
  4. What STA Checks

Part 1 · Timing Paths and Checks · All levels

What STA Checks

What static timing analysis covers, how it models a design as a graph, and why its answers are deliberately pessimistic.

  • 4topics
  • 4lessons

Static timing analysis answers one question for every path in a design: does the signal arrive early enough to be captured, and late enough not to corrupt the previous capture? It does this without simulating a single input vector. This topic builds the mental model the rest of the course relies on: the timing graph, the kinds of paths, and the reasons the analysis errs on the safe side.

Lesson

After it you can...

STA Versus Simulation

Say what STA proves, what it cannot, and why both are needed.

The Timing Graph

Draw a netlist as nodes and delay arcs and compute an arrival time.

Path Types and Endpoints

Classify any path by its startpoint and endpoint.

Why STA Is Pessimistic by Design

Explain where the pessimism comes from and where it is removed.

Suggested order: the four lessons in page order. The RTL view of the same material is in STA Foundations and Setup, Hold and Slack; this course goes one level deeper.

Check yourself Why can STA find a timing violation that no simulation ever exposed?

Because it checks every structural path against its worst-case delay, not just the paths a testbench happens to exercise. A path that is never toggled in simulation still has a delay, and STA still checks it.

Interview

Open any STA answer with the three-part definition: STA is exhaustive over paths, independent of input vectors, and conservative about delay. Everything else is detail on those three words.

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See also

  • Setup and Hold Checks
  • Clocks in Timing Analysis
  • Delay Models