A library offers the same cell at several threshold voltages. Low-Vt cells switch fast and leak more; high-Vt cells are slower and leak less.
The tool spends fast cells only where slack demands them. Paths with room take high-Vt cells and give back leakage.
Cell flavour | Speed | Leakage | Used where |
|---|---|---|---|
Low-Vt | Fast | High | Critical paths with no slack to spare. |
High-Vt | Slow | Low | Paths with comfortable positive slack. |
A power domain is a region the design can switch off while the rest runs. Its boundary needs two special cells, both recorded as intent rather than built by hand.
Isolation cells clamp the outputs of a sleeping domain to a safe value. Retention cells keep chosen flop state alive through the sleep so the block resumes cleanly.
Cell | Role | Needed when |
|---|---|---|
Isolation cell | Clamps an off-domain output to 0 or 1 | The signal crosses into a domain that stays on. |
Retention flop | Holds state on a standby supply | The block must resume without a full reset. |
Level shifter | Moves a signal between voltage levels | Neighbouring domains run at different voltages. |
The sketch below is illustrative text, not runnable code. UPF describes the domains and cells; the flow implements them.
illustrative UPF intent (described, not run; names invented for this lesson):
create_power_domain PD_SW -elements {u_dsp u_mul}
create_power_domain PD_TOP -elements {top}
set_retention RET -domain PD_SW -elements {u_dsp/state_reg}
set_isolation ISO -domain PD_SW -clamp_value 0
the flow reads this intent and inserts the retention and isolation cellsAn off domain without isolation drives floating values into live logic. The result is crowbar current and corrupted state, not just wasted power.
The live logic sees a floating input, which risks crowbar current and a false interrupt. The crossing needs an isolation clamp.
No. A cheap re-reset beats retention here. Reserve retention for state that is slow or impossible to rebuild.