Retiming repositions registers without adding or removing any along a path. Each input-to-output path crosses the same number of registers before and after.
Only the split of logic between consecutive registers changes. That split sets the clock period.
A forward move pushes registers across a gate toward the outputs. A backward move pulls a register back across a gate toward the inputs.
Move | Across | Register count |
|---|---|---|
Forward | A 2-input gate: two input registers become one output register | Falls by one. |
Backward | A 2-input gate: one output register becomes two input registers | Rises by one. |
Forward | A 2-way fanout stem: one register becomes one per branch | Rises by one. |
Backward | A 2-way fanout stem: one register per branch merges into one | Falls by one. |
Across plain wire fanout there is no logic to cross. A forward move still duplicates one register per branch, and a backward move merges them.
Take three EXAMPLE blocks of 6, 2 and 4 ns between two registers. The middle register starts between the second and third block.
EXAMPLE block delays (classroom parameters, not a process): A = 6 ns, B = 2 ns, C = 4 ns
before: stage 1 = 6 + 2 = 8 ns, stage 2 = 4 ns
period before = max(8, 4) = 8 ns, EXAMPLE frequency = 1 / 8 ns = 125 MHz
move the middle register back across B
after: stage 1 = 6 ns, stage 2 = 2 + 4 = 6 ns
period after = max(6, 6) = 6 ns, EXAMPLE frequency = 1 / 6 ns = 166.67 MHz
one register moved, none added: count 1 -> 1 on this pathThe period falls from 8 ns to 6 ns. Latency stays at two register stages either way.
Two registers replace it, one per input. Path latency is unchanged: each path still crosses one register at the new position.
The slower of the two new 6 ns stages. Both stages are 6 ns, so the period is 6 ns.