CPI is cycles per instruction and IPC is its inverse. Execution time follows from instruction count, CPI and frequency.
Assume I = 1.0 x 10^9 instructions, CPI = 1.45, f = 3.0 GHz
T_exec = 10^9 x 1.45 / (3.0 x 10^9 Hz) = 1.45 / 3.0 s = 0.483 s, about 0.48 sStall sources add onto a base CPI. Each component is measured per instruction, so the parts sum to the total.
Component | Cycles per instruction | Share |
|---|---|---|
Base | 1.00 | 69% |
Frontend stalls | 0.25 | 17% |
Control (branch recovery) | 0.20 | 14% |
Total CPI | 1.45 | 100% |
CPI = 1.00 + 0.25 + 0.20 = 1.45 cycles per instruction
shares: 1.00/1.45 = 69%, 0.25/1.45 = 17%, 0.20/1.45 = 14% (rounded, sums to 100%)A repartition changes frequency and CPI together. Speedup is the ratio of IPC-times-frequency products, which is the throughput ratio.
Before | After | |
|---|---|---|
Frequency | 2.60 GHz | 2.79 GHz (+7.3%) |
IPC | 1.84 | 1.73 (-6.0%) |
Throughput (GIPS) | 4.78 | 4.83 |
Assume the stated example parameters: f 2.60 -> 2.79 GHz, IPC 1.84 -> 1.73
GIPS_before = 1.84 x 2.60 = 4.784
GIPS_after = 1.73 x 2.79 = 4.8267, about 4.83
speedup = 4.8267 / 4.784 = 1.009, about +0.9%: near break-even
CPI: 1/1.84 = 0.543 -> 1/1.73 = 0.578, a +0.035 cycle-per-instruction regressionThe frequency gain was eaten by higher stall and recovery cost. Without this ratio, either number alone misleads.
CPI = 1/2.0 = 0.50 cycles per instruction.
T = 2.0 x 10^9 x 1.2 / 3.0 x 10^9 = 0.80 s.