Charging and discharging capacitance costs energy each transition. The standard model is switching power equals activity times C times V squared times f.
Term | Meaning | Unit |
|---|---|---|
C | Effective switched capacitance | Farad |
V | Supply voltage | Volt |
f | Clock frequency | Hertz |
alpha | Activity factor: fraction of capacitance switching per cycle | None |
Voltage matters most because it is squared. Frequency and activity enter linearly.
Assume C = 1 nF, V = 0.8 V, f = 3 GHz and alpha = 0.15. The calc block below evaluates the formula.
P_dyn = alpha x C x V^2 x f
= 0.15 x 1e-9 F x (0.8 V)^2 x 3e9 Hz
= 0.15 x 1e-9 x 0.64 x 3e9
= 0.288 W = 288 mWLowering only the voltage to 0.7 V scales power by the square of the ratio. The result is 0.2205 W, shown below.
P_new = P_old x (V_new / V_old)^2
= 0.288 W x (0.7 / 0.8)^2
= 0.288 W x 0.765625
= 0.2205 W = 220.5 mWClocks toggle every cycle, so an ungated clock tree has alpha near 1. Datapath and control switch only on useful work, so their alpha is well below 1.
Block | What sets its activity | How the architect lowers it |
|---|---|---|
Clock tree | Gating coverage | Clock gating, fewer clocked elements |
Datapath | Operand changes per cycle | Operand isolation, narrower active widths |
Control and decode | Instruction mix | Simpler decode, sleep modes when idle |
It doubles. Power is linear in C.
Power halves. Energy per cycle is unchanged, because the same switching spread over twice the time still costs the same charge per cycle.