Partition for proximity

Traffic kept inside a partition costs little. Traffic across a cut pays wire delay, NoC hops and verification of the boundary.

The matrix below is illustrative, in GB/s. Zeros mean no direct traffic between that pair.

The bad cut isolates SRAM alone and crosses 18 GB/s. The good cut places DMA with SRAM and crosses 6 GB/s.

Cut-crossing traffic (illustrative)
  bad cut  = 12 + 4 + 2 = 18 GB/s
  good cut = 4 + 2 + 0 + 0 = 6 GB/s
  reduction = 18 - 6 = 12 GB/s (12 / 18 = 67%)

Distance to latency budget

Long links consume the latency budget before logic does. Assume 2.0 ns per NoC hop and 120 ps per mm of wire, both stated and illustrative.

Link latency vs budget (illustrative)
  wire   = 8 mm x 120 ps/mm = 960 ps = 0.96 ns
  detour = 0.96 ns x 1.14 = 1.09 ns
  hops   = 3 x 2.0 ns = 6.00 ns
  total  = 6.00 + 1.09 = 7.09 ns vs 5.00 ns budget
  excess = 7.09 - 5.00 = 2.09 ns
  at 1 GHz the path needs 8 cycles against a 5-cycle budget

The fix is architectural: move the endpoints, remove a hop, or add pipeline stages. Buffering alone does not change the hop count.

Domain-aware cuts

Cuts should follow clock and power boundaries. Each extra crossing adds synchronizer latency and isolation cost.

Crossing cost bound (illustrative)
  crossings = 63, penalty = 2 cycles each at 1 GHz (1.0 ns period)
  bound = 63 x 2 x 1.0 ns = 126 ns if all lay on one path

Real paths see a fraction of that bound. The ledger still records the count, because verification proves every crossing.

Common mistakes

Related topics

• On-chip networks

• SoC course