Puzzle

Difficulty: Hard · Puzzle 6 of 6 · Topic: Race Condition Puzzles

When load and clear are both 1 on the same edge, what can data become? Is the result language-deterministic?

Code

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module tb;
  bit clk = 0;
  bit load = 1;
  bit clear = 1;
  byte in = 8'hA5;
  byte data = 8'h00;
  always #5 clk = ~clk;

  always_ff @(posedge clk) begin
    if (load) data <= in;
  end

  always_ff @(posedge clk) begin
    if (clear) data <= 8'h00;
  end

  initial begin
    @(posedge clk);
    $strobe("[%0t] data=%0h", $time, data);
    $finish;
  end
endmodule

Hint

Two different processes enqueue NBAs to same variable in same slot.

Step-by-step solution

1) Both always_ff blocks schedule NBA updates for data at t=5.
2) Relative ordering of those cross-process NBAs is not guaranteed by intent and is tool/order dependent.
3) data may end as 8'hA5 or 8'h00 depending on process order.
4) Architecturally correct fix is single-writer sequential logic.

Answer

Answer: Result is nondeterministic: data can be 8'hA5 or 8'h00 at t=5. Multiple sequential writers create a race.

Why candidates get it wrong

Using always_ff does not legalize multiple writers to the same flopped signal.

Interviewer follow-up

Refactor this into one always_ff with explicit priority (clear over load or vice versa).

Related topics

• Back to Race Condition Puzzles

• Concurrency & Timing Puzzles section