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Course contents

  • How to Use This Course
  • Protocol Metrics Reference
  • Protocols Glossary
  • Reading Path
  • Protocol Fundamentals25
  • AMBA Family (APB / AHB / AXI)17
  • Coherence Fabrics (ACE / CHI)17
  • Memory Interfaces (DDR / LPDDR / HBM)17
  • PCIe & CXL17
  • Embedded Peripherals (I2C / SPI / UART)17
    • I2C Timing & Arbitration
      • I2C Timing & Arbitration: Concepts
      • I2C Timing & Arbitration: Integration
      • I2C Timing & Arbitration: Debug
      • I2C Timing & Arbitration: Interview
    • SPI Modes & Chip-Select Rules
    • UART Flow Control
    • Peripheral Integration Debug
    • Embedded Peripherals (I2C / SPI / UART): Tricky Q&A
  • High-Speed I/O (USB / Ethernet / MIPI)17
  • Protocol Verification & Compliance17
  • Protocols Interview Prep5
  • Interface Protocols Cheatsheet
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←I2C Timing & Arbitration
  1. Topics
  2. Bus Protocols
  3. Embedded Peripherals (I2C / SPI / UART)
  4. I2C Timing & Arbitration
  5. I2C Timing & Arbitration: Debug
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    Interface ProtocolsAll levels

    I2C Timing & Arbitration: Debug

    Debug for I2C Timing & Arbitration.

    Primary debug scenario

    Symptom: I2C sensor returns NACK on every address byte. Device works on another board.

    Triage steps

    1. Scope SCL/SDA: is START condition clean? Are pull-ups present?

    2. Verify device address matches firmware (check strap pins).

    3. Check device reset — is it held in reset or power-gated?

    4. Measure SCL frequency — too fast for device or bus capacitance?

    5. If SCL remains low, identify which participant holds it and compare the measured duration with the target and controller timeout contracts before changing firmware.

    Common pitfalls

    • Checking software address once without verifying hardware straps.

    • Missing pull-ups on prototype board.

    • I2C speed too high for bus capacitance.

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    See also

    • I2C Timing & Arbitration: Concepts