Primary debug scenario

Symptom: SPI flash read returns shifted/garbage data. Same flash chip works with external debugger.

Triage steps

1. Verify CPOL/CPHA match device datasheet.

2. Scope CS timing: setup before first clock, hold after last clock.

3. Check MSB/LSB first setting.

4. Compare clock speed — too fast for board routing?

5. If MISO floats while no target is selected, check whether the board/controller requires a defined idle bias; do not add a pull-up without the electrical contract.

Common pitfalls

• Changing clock speed without checking CPOL/CPHA.

• CS deassert one cycle too early relative to device hold time.

• Assuming Mode 0 without checking device datasheet.