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Course contents

  • How to Use This Course
  • Protocol Metrics Reference
  • Protocols Glossary
  • Reading Path
  • Protocol Fundamentals25
    • Layering & Transaction Model
    • Handshake & Backpressure
    • Ordering & Outstanding Rules
      • Ordering & Outstanding Rules: Concepts
      • Ordering & Outstanding Rules: Integration
      • Ordering & Outstanding Rules: Debug
      • Ordering & Outstanding Rules: Interview
      • Ordering & Outstanding Rules: Deep Dive
      • Ordering & Outstanding Rules: Worked Examples
    • Bandwidth & Latency Budgeting
    • Protocol Fundamentals: Tricky Q&A
  • AMBA Family (APB / AHB / AXI)17
  • Coherence Fabrics (ACE / CHI)17
  • Memory Interfaces (DDR / LPDDR / HBM)17
  • PCIe & CXL17
  • Embedded Peripherals (I2C / SPI / UART)17
  • High-Speed I/O (USB / Ethernet / MIPI)17
  • Protocol Verification & Compliance17
  • Protocols Interview Prep5
  • Interface Protocols Cheatsheet
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←Ordering & Outstanding Rules
  1. Topics
  2. Bus Protocols
  3. Protocol Fundamentals
  4. Ordering & Outstanding Rules
  5. Ordering & Outstanding Rules: Debug
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    Interface ProtocolsAll levels

    Ordering & Outstanding Rules: Debug

    Debug for Ordering & Outstanding Rules.

    Primary debug scenario

    Symptom: DMA passes single-ID tests. Fails with multiple outstanding IDs and width converter between master and interconnect. Data corruption ~0.5% under stress.

    Leading hypotheses: Bridge ID remap or sub-burst response reorder — responses matched to wrong upstream transaction.

    Triage steps

    1. Log every request/response with upstream ID, downstream ID, address, beat.

    2. Check same-ID response order — any inversion is protocol violation.

    3. If same-ID legal, check cross-ID order assumptions in software.

    4. Inspect bridge: ID map table, outstanding tracking depth, response FIFO.

    5. Reproduce with 2 outstanding reads to same address, different IDs.

    6. Add scoreboard at bridge boundary with full ID+port key.

    Common pitfalls

    • Assuming strict global ordering.

    • Debugging data channel without response order log.

    • Single-ID regression only after fix.


    Secondary scenario

    Symptom: After Linux kernel upgrade, network driver sees corrupt RX descriptors. Hardware unchanged.

    Triage steps

    1. Kernel may have changed DMA mapping attribute (coherent vs streaming).

    2. Check dma_alloc_coherent vs dma_map_single — cache maintenance differs.

    3. Verify barrier in driver between descriptor write and doorbell.

    4. Compare driver descriptor ring setup old vs new kernel.

    Common pitfalls

    • Blaming hardware when driver removed a necessary barrier.

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    See also

    • Ordering & Outstanding Rules: Concepts
    • Ordering & Outstanding Rules: Deep Dive
    • Ordering & Outstanding Rules: Worked Examples