push_i and pop_i are requests. A request changes FIFO state only when the corresponding operation is accepted.
Event | Conservative acceptance rule | Effect |
|---|---|---|
Push |
| Write one word and advance the write pointer. |
Pop |
| Return one word and advance the read pointer. |
Both accepted | Both guards are true | Pointers both advance; occupancy is unchanged. |
Push while full | Rejected | No write and no write-pointer movement. |
Pop while empty | Rejected | No read and no read-pointer movement. |
External logic may raise requests at a boundary, but the FIFO must never overwrite unread data or return a word that was never written. Count accepted operations, not request levels.
For the telemetry FIFO, a push observed at full is rejected even when a pop occurs on that edge. That conservative choice costs one slot opportunity but avoids depending on same-address memory collision behavior.
Conservation: occupancy equals accepted pushes minus accepted pops since reset.
Bounds: occupancy is always between zero and DEPTH, inclusive.
Ordering: accepted pop N returns accepted push N; no duplication, loss, or reordering.
Pointer discipline: a pointer advances exactly once for its accepted operation and otherwise holds.
Question | This topic's baseline answer |
|---|---|
What happens to an illegal push or pop? | It is ignored and may raise an error pulse or assertion in a stricter wrapper. |
Is output data combinational? | No. The baseline has registered output data updated by an accepted pop. |
Can full accept a replacement push with a simultaneous pop? | Not in the conservative baseline; an elastic variant is covered separately. |
Does reset clear memory? | No. Reset clears pointers, occupancy, flags, and output-valid state; stale memory is unreachable while empty. |
Each slot is one clock cycle, numbered from 0. An operation takes effect at the edge that ends its slot, so occupancy and the pointers change one slot later.
Slots 0 and 1: only push_i is high. Occupancy climbs to 2 and wptr follows; rptr stays at 0.
Slots 2 and 3: push_i and pop_i are both high. Occupancy holds at 2, yet wptr and rptr both advance every cycle, and wptr wraps from 3 to 0. One word enters and one leaves, and the stream continues at one word per cycle.
Slot 4: a push alone lifts occupancy to 3 in slot 5.
Slot 5: a pop alone brings occupancy back to 2 in slot 6.
Occupancy remains 5, but both pointers advance. One old word leaves and one new word enters; treating this as 'nothing happened' would corrupt ordering.
Empty prevents all pre-reset words from being read. Clearing the array adds reset logic to every storage bit and can prevent SRAM inference; reset only the control state.