Eleven checks cover interfaces, depth, fanout, assumptions, parameters, exceptions, gating, resets and constraints. Each row names the evidence that closes the item.
Check | Evidence |
|---|---|
Block inputs and outputs are registered, or the I/O budget is written down | Interface table with delays |
Estimated logic depth of the three worst paths is within the budget | Depth budget sheet; |
No long operator chains or deep | Code review |
High-fanout control signals identified; replication or hierarchy preserved where needed | Fanout list; synthesis report shows copies |
Late-arriving signals feed the last stage of selects | Code review |
One-hot / parallel structures protected by assertions |
|
Pipeline depth, output registers and replication counts are parameters | Parameter list with a latency-aware testbench |
Multicycle and false paths have an RTL reason and a test | Constraint file with comments; assertion |
Clock gating uses library ICGs with test enable | Gating report |
Resets are synchronised and fanout-controlled | Reset tree document |
Constraints cover all clocks, inputs and outputs | Unconstrained-endpoints report is empty |
(1) Latency parameters: a testbench that takes the latency from the same parameter. (2) One-hot guarantees: $onehot0 assertions that fail in simulation if the assumption is broken. (Also: an empty unconstrained-endpoints report as a synthesis gate.)