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Course contents

  • How to Use This Course
  • Reading Path
  • STA Glossary
  • STA Metrics Reference
  • STA Mastery Cheatsheet
  • Timing Paths and Checks16
  • Constraints & SDC Fundamentals20
  • Delay Graph & Path Analysis16
  • Beyond Setup and Hold16
  • Multi-Corner Multi-Mode Signoff16
  • OCV, AOCV, POCV and Variation16
  • Crosstalk and Noise16
  • ECO and Closure16
  • STA Debug Playbook16
  • STA Interview Prep26
    • STA Whiteboard Framework
    • STA Framework Drills
    • Scenario: MMMC Storm
      • The Scenario
      • Investigation
      • Root Cause and Fix
      • How to Narrate It
    • Scenario: ECO Under Pressure
    • Scenario: Constraint Ghost
    • STA Interview Q&A Bank
    • STA Interview Q&A Bank (Expanded)
  • Capstone Timing Signoff Lab4
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‹Scenario: MMMC Storm
  1. Topics
  2. Static Timing Analysis
  3. STA Interview Prep
  4. Scenario: MMMC Storm
  5. Investigation

Part 10 · Interview Prep · All levels

Investigation

Compare the same endpoints in the failing and passing scenarios: if the slack loss is proportional to path delay, the library data, not the constraints, differ.

On this page

    Step 1: compare cold against hot, endpoint by endpoint

    Take a sample of post-optimisation endpoints and compare their slack in lowv_ss_hot and lowv_ss_cold. The shape of the difference says what kind of cause it is. Uncertainty and margins are constant offsets, independent of path delay; derates and library effects are proportional to delay, because a late derate multiplies each delay. A proportional loss therefore points to the derates or the libraries, not the constraints. To tell a derate from a library effect, compare the same arcs across the two scenarios, diff the applied derates (a derate audit), and confirm in the library data (the 0.72 V hot and cold arc table).

    example.py
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    d_hot = [1.15, 0.90, 0.70, 0.40]                       # data path delay in the hot scenario, ns
    slack_hot = [0.056, 0.058, 0.060, 0.062]                # post-optimisation slacks, all just above zero
    ratio_cold = 0.12                                       # measured: cold delays are 12% larger
    slack_cold = [round(s - ratio_cold * d, 3) for s, d in zip(slack_hot, d_hot)]
    loss = [round(h - c, 3) for h, c in zip(slack_hot, slack_cold)]
    per_delay = [round(l / d, 3) for l, d in zip(loss, d_hot)]
    assert slack_cold == [-0.082, -0.05, -0.024, 0.014]
    assert per_delay == [0.12, 0.12, 0.12, 0.12]
    assert min(slack_cold) == -0.082
    print("PASS: cold slack", slack_cold, "; slack loss per ns of path delay", per_delay)

    Endpoint

    Hot path delay (ns)

    Slack hot

    Slack cold

    Loss per ns of delay

    1

    1.15

    +0.056

    -0.082

    0.12

    2

    0.90

    +0.058

    -0.050

    0.12

    3

    0.70

    +0.060

    -0.024

    0.12

    4

    0.40

    +0.062

    +0.014

    0.12

    Every endpoint loses 0.12 ns per nanosecond of path delay: the cold delays are uniformly 12% larger. The sample endpoints are post-optimisation endpoints, so their hot slacks sit just above zero and the 12% cold slowdown pushes the longest ones below zero, with the worst path (1.15 ns) landing at exactly -0.082 ns. A proportional loss is the fingerprint of a derate or library effect: all cells are slower by a similar factor. A constraint problem would show offsets that do not scale with path length. The derate audit (the same arcs with the applied derates diffed across the two scenarios) rules a derate change out here, and the 0.72 V arc table confirms the libraries differ, so the cause is the library data.

    Step 2: check the library data

    Check

    Result (illustrative)

    Delay of a reference arc at 0.72 V, hot

    1.00 (relative)

    Delay of the same arc at 0.72 V, cold

    1.12

    Same arcs at the functional voltage, hot and cold

    Hot slower than cold

    At the low voltage the cold library is 12% slower than the hot one: temperature inversion. At the functional voltage the traditional order holds (hot is slower). The functional-voltage matrix followed the traditional hot-slowest rule, which temperature inversion breaks at low voltage.

    Common pitfall

    Blaming uncertainty or margins without checking the shape. Uncertainty and margins add the same amount to every path, but derates multiply delay just as library effects do, so only a derate audit plus the library data separates a derate from a library effect.

    Interview

    Describe the discriminating test: constant offset (uncertainty, margin) versus proportional loss (derate, library), then the derate audit and the library arc table.

    Check yourself If the loss had been a constant 0.06 ns on every endpoint, what would you have suspected?

    A global additive input such as clock uncertainty or a margin in that scenario's setup: both are constant offsets, independent of path delay.

    Related topics

    • The Scenario

    • Next: Root Cause and Fix

    • Temperature Inversion

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    See also

    • How to Narrate It