Early in a project there is no clock tree, so the clock is treated as ideal. After clock tree synthesis the clock is propagated. The change moves every number in the report, so you must know which model a report used before you compare it with another.
Ideal clock | Propagated clock | |
|---|---|---|
Clock arrival at each flop | A single specified value (often zero) plus any set latency | Computed from the real buffers, gates and wires of the clock network |
Skew between flops | Zero (unless specified) | Real and different per flop pair |
Typical use | Synthesis and early planning, before clock tree synthesis | Placement-aware optimisation after clock tree synthesis and signoff |
SDC statement | Default for a defined clock | set_propagated_clock on the clock or its pins |
Take the setup example from the previous topic with period 2.00 ns, clock-to-Q 0.40, path 1.00, setup 0.10 and uncertainty 0.10. With an ideal clock the latencies are zero. With a propagated clock the launch flop sees 0.30 ns and the capture flop 0.35 ns.
T, Dcq, Dpath, S, U = 2.00, 0.40, 1.00, 0.10, 0.10
def setup_slack(L, C):
return (T + C - S - U) - (L + Dcq + Dpath)
ideal = setup_slack(0.0, 0.0) # 2.00 - 0.20 - 1.40 = 0.40
propagated = setup_slack(0.30, 0.35) # 0.45
assert abs(ideal - 0.40) < 1e-9 and abs(propagated - 0.45) < 1e-9
assert abs((propagated - ideal) - 0.05) < 1e-9 # the 0.05 ns of skew in the path's favour
print("PASS: ideal slack", round(ideal, 2), "propagated slack", round(propagated, 2))The same path moves from +0.40 to +0.45 ns because the capture clock arrives 0.05 ns later than the launch clock. On another path the skew can go the other way and cost slack. That is why a design that is clean with ideal clocks can fail after clock tree synthesis.
Signoff runs use propagated clocks everywhere; an ideal clock in a signoff run is a finding.
The clock uncertainty applied is appropriate to the clock model: ideal-clock analysis needs larger uncertainty to cover the skew not yet known.
Reports compared across stages state which clock model each used.
The skew between launch and capture flops went against the path (the launch clock later than the capture clock), and the uncertainty or extraction changed from estimates to real values. Both are clock-side or analysis-side effects, not necessarily a logic change.