Part 2 · Phases & Lifecycle · Intermediate

reset_phase Behavior: Coordinated Reset Across Agents

What reset_phase does, pre/post_reset roles, driving interfaces idle, and objection discipline during reset.

reset_phase contract

Every agent's reset_phase task should: raise an objection, drive the interface to a safe idle state, apply or wait for reset, wait for reset deassertion and settling, then drop the objection. Because all agents share this phase with objections, no agent leaves reset until all agents finish .

diagram
[PHASE][UVM] reset sub-phase chain

pre_reset:  wait power-good, enable clocks
reset:      assert rst, drive idle, deassert rst  ← primary work
post_reset: pipeline flush, VIP settle waits
  • pre_reset: clocks stable but reset may still be asserted.

  • reset: primary reset assertion and idle driving.

  • post_reset: short settling after deassert before configure.


Reference implementation

systemverilog
class my_driver extends uvm_driver #(my_item);
  virtual dut_if vif;

  function void build_phase(uvm_phase phase);
    super.build_phase(phase);
    if (!uvm_config_db#(virtual dut_if)::get(this, "", "vif", vif))
      `uvm_fatal("NOVIF", "virtual interface not found")
  endfunction

  task reset_phase(uvm_phase phase);
    phase.raise_objection(this, "driver reset");
    @(posedge vif.clk);
    drive_idle();                    // safe known values on bus
    wait (vif.rst_n === 1'b1);       // wait for TB reset release
    repeat (2) @(posedge vif.clk);   // settle cycles
    phase.drop_objection(this, "driver reset done");
  endfunction

  task drive_idle();
    vif.valid <= 0;
    vif.data  <= '0;
  endtask
endclass
systemverilog
// TB top or env controls reset generation
task reset_phase(uvm_phase phase);
  phase.raise_objection(this, "tb reset gen");
  vif.rst_n <= 0;
  repeat (10) @(posedge vif.clk);
  vif.rst_n <= 1;
  repeat (5) @(posedge vif.clk);
  phase.drop_objection(this, "tb reset gen done");
endtask

Active vs passive agents

Passive monitors still implement reset_phase to flush queues and wait for reset deassert. Active drivers additionally drive idle. Both must balance objections.

Key takeaways

  • reset_phase is the coordinated reset home — not run_phase.

  • Drive idle before reset deassert to avoid X-propagation on buses.

  • All agents must drop reset objections before configure begins.

Common pitfalls

  • Register programming in reset_phase — belongs in configure_phase.

  • One agent dropping objection early while others still in reset.

  • Forever loop in reset_phase without objection boundaries.


Ordering with configure

diagram
[PHASE][UVM] reset  configure handoff

reset_phase ends (all objections dropped)
        │
        ▼
configure_phase begins (program CSRs via frontdoor)
        │
        ▼
main_phase (stimulus sequences)