VLSI DV Interview Puzzles · All levels

Case Equality vs Wildcard Equality

For this value with an unknown bit, what do `==`, `===`, and `==?` return?

Puzzle

Difficulty: Easy · Puzzle 6 of 6 · Topic: Datatype and Bit Puzzles

For this value with an unknown bit, what do `==`, `===`, and `==?` return?

Code

systemverilog

module p6;
  logic [3:0] v = 4'b10x1;
  initial begin
    $display("eq=%b", v == 4'b1001);
    $display("caseeq=%0d", v === 4'b10x1);
    $display("wild=%0d", v ==? 4'b1??1);
  end
endmodule

Hint

`===` is exact 4-state match. `==?` treats wildcard bits in the pattern (RHS) as don't-care.

Step-by-step solution

diagram

1) `v == 4'b1001` returns x because the x bit affects normal logical equality.
2) `v === 4'b10x1` returns 1 because every bit, including x, matches exactly.
3) `v ==? 4'b1??1` returns 1 because RHS `?` bits are don't-care and only MSB/LSB are checked.

Answer

Answer: eq=x, caseeq=1, wild=1

Why candidates get it wrong

A common mistake is treating `==?` like `===` or assuming wildcarding happens on both operands.

Interviewer follow-up

What would `v ==? 4'b0??1` return, and why?

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