Interface Protocols · All levels
Scoreboard & Checker Strategy: Interview Drills
Interview Drills for Scoreboard & Checker Strategy.
Interview drills
Interview Drills for Scoreboard & Checker Strategy focuses on false fail rate, escaped bug count, response match latency. The goal is to connect the observable symptom to protocol mechanism, ownership, and regression risk.
PROMPT
You see false fail rate, escaped bug count, response match latency on Scoreboard & Checker Strategy. Walk through root cause and fix.
STRONG ANSWER
1. Names the layer and transaction identity.
2. Explains scoreboards correlate requests and responses while assertions check local temporal rules and illegal combinations.
3. Requests scoreboard key map, assertion failure waveform, expected/actual transaction diff.
4. Proposes one reduced sequence and one system regression.
WEAK ANSWER
Jumps to widening the interface, increasing FIFO depth, or blaming firmware without evidence.Diagram to draw on the whiteboard
Scoreboard correlation
SCOREBOARD = MATCH REQUEST TO RESPONSE
inbound req : key = {id, addr}
outbound resp: key = {id}
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v
map[key] = expected ; on response compare actual
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mismatch -> log first failing key + timestamp (not the 100th)
Assertions catch LOCAL rules; scoreboards catch END-TO-END correctness.Root-cause tree to narrate
ROOT-CAUSE TREE — Scoreboard & Checker Strategy
false fail rate, escaped bug count, response match latency looks wrong
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reproducible?
/ \
no yes
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flaky env same first transaction every time?
/ seed / \
yes no
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protocol rule timing/reset/PVT
or config bug or load-dependentProtocol deep dive
Verification closes the gap between 'works in directed test' and 'legal under all stressed traffic'.
Concept diagram
VERIFICATION CLOSURE LOOP
spec clause -> test -> assertion -> coverage -> waiver -> signoff
^ |
+--------- gap found --------+Metric graph
COVERAGE vs ESCAPE RATE
escapes
|*
| *
| *
| ** <- knee: more random helps
| ****
+----------------> constrained-random depthMetrics and artifacts to collect
compliance pass rate
coverage closure
scoreboard mismatch rate
assertion fire count
waiver log
Mini case study
Block passed VIP compliance but chip failed: system test omitted cross-master ID reuse through a bridge. Scoreboard key did not include upstream port ID.
Debug branches
If VIP pass but silicon fail, check integration assumptions.
If scoreboard noisy, fix key (ID+port+addr).
If coverage plateau, add compliance gap analysis not more repeats.
Senior review question
Ask: what is the first transaction that deviates, and which spec rule does it test?
Key takeaways
Connect every protocol claim to a transaction identity and measurable metric.
Store the artifact (waveform, log, counter) next to every signoff decision.
Common pitfalls
Debugging timeouts without finding the first bad transaction.
Quoting peak bus width without payload efficiency and retry overhead.
Treating VIP compliance as a substitute for system integration replay.
Interview whiteboard
Draw layers first, then place the failing transaction on the diagram.