For the running SRAM, each write stores 32 data bits plus one even-parity bit. The read path uses continuous unpacking and checking so the snippet is valid RTL rather than an unscoped procedural assignment.
Read the top half from the inputs down: each XOR gate outputs the small number beside it. The bottom half is the read path, top to bottom.
Generate: the tree reduces eight bits to one. Four ones give p = 0, so the stored nine bits hold an even number of ones. A 32-bit word uses the same tree with more levels.
Inject: the mask XOR sits after storage and before the checker. A mask with one 1 flips one bit and must raise parity_error; production keeps the mask at zero and locked.
Check: the read tree recomputes parity over the data and XORs it with the stored p. Any odd number of flips gives 1; an even number gives 0 and escapes.
// snippet: even parity store and check
logic [DW:0] mem [0:DEPTH-1];
logic [DW:0] protected_word;
logic [DW-1:0] raw_data;
logic stored_parity;
always_ff @(posedge clk)
if (write_en) mem[write_addr] <= {^write_data, write_data};
assign protected_word = mem[read_addr]; // asynchronous-read teaching model
assign {stored_parity, raw_data} = protected_word;
assign parity_error = (^raw_data) ^ stored_parity;
assign read_data = raw_data;A target SRAM with registered reads moves protected_word into the clocked read stage; the parity equation and reporting policy remain unchanged. The implementation lesson must match the selected macro latency.
Parity detects any odd number of bit flips but cannot identify the bad bit. An even number of flips can cancel, so the protection claim must say exactly what is covered.
Latch address, the stored parity/check result, and operation context with the error.
Count errors with a saturating counter.
Provide a controlled injection XOR before the checker, disabled and locked in production.
Do not silently return corrupt data without a valid/error indication.
No. Two flips preserve parity. This is why parity's diagnostic claim is weaker than SECDED.