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Course contents

  • How to Use This Course
  • The NanoSoC Tour
  • Reading Path
  • SoC Glossary10
    • Glossary: Address and decode
    • Glossary: Interconnect
    • Glossary: Clocks and resets
    • Glossary: Power
    • Glossary: Interrupts and DMA
    • Glossary: Memory, boot and security
    • Glossary: Integration and handoff
    • Glossary: Verification, test and bring-up
    • Glossary: Package and I/O
    • Glossary: Signoff and process
  • SoC Metrics Reference
  • SoC Cheatsheet
  • What SoC Integration Is12
  • Architecture and Budgets21
  • Memory Maps and Address Decode26
  • Interconnect and Bus Fabrics26
  • Clock and Reset Architecture24
  • Power Architecture21
  • Interrupts, DMA and Peripherals15
  • Memories, Boot and Security21
  • IP Integration and Handoff21
  • Top-Level Verification and Bring-up21
  • Package, Pads and I/O18
  • Chip Signoff and Tapeout18
  • SoC Interview Prep16
  • Capstone: Integrate NanoSoC14
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←SoC Glossary
  1. Topics
  2. SoC Design
  3. SoC Glossary
  4. Glossary: Interconnect

SoC DesignAll levels

Glossary: Interconnect

SoC integration glossary terms: interconnect.

Interconnect

Term

Meaning

Taught in

4 KB rule

An AXI burst must not cross a 4 KB boundary, so a master or bridge splits any longer burst at the boundary.

The 4 KB Rule and Burst Splitting

APB

The simple peripheral bus: a setup phase, an access phase, PREADY to stretch the access. NanoSoC uses the APB3 style, which has PSLVERR but no PSTRB and no PPROT.

Inside the AXI to APB Bridge

Arbitration

Choosing which master gets a contended slave. NanoSoC uses round robin per slave with one idle cycle when the winner changes.

Round-Robin and Its Measured Cost

AXI4

The public burst-based bus with five independent channels (AW, W, B, AR, R) each with a valid and ready handshake. NanoSoC uses it at 32 bits with INCR bursts of up to 16 beats.

IDs, Outstanding Counts and No WID

Beat

One data transfer on a channel in one clock where valid and ready are both high. A burst is a series of beats.

IDs, Outstanding Counts and No WID

Bottleneck link

The link in a path with the lowest sustained rate. It sets the throughput of the whole path, so raising any other link changes nothing.

Spotting the Bottleneck

Bridge

A block that converts between protocols or clocks, such as the AXI to APB bridge. Each bridge adds latency and lowers throughput.

Bridge Costs and Where Bridges Belong

Burst efficiency

The fraction of cycles that carry data: with L beats and one bubble per burst it is L/(L+1), which is 94.1% at L = 16.

Link Table and Sustained Rates

Crossbar

An interconnect with a separate path per master and slave pair, so transfers to different slaves proceed together and only a shared slave needs arbitration.

Shared Bus, Crossbar and Hierarchy

Deadlock

A cycle of masters and slaves each waiting for another, so nothing moves. At SoC level it comes from dependencies the interconnect cannot see.

How Deadlock Happens at SoC Level

Firewall (address range)

A check in front of a slave that admits or refuses accesses by address range and master identity, beyond the secure bit.

Address-Range Firewalls and Master IDs

ID and outstanding transactions

AXI tags each request with an ID; responses with the same ID return in order. Write data has no ID in AXI4. Outstanding means issued but not yet answered.

IDs, Outstanding Counts and No WID

Network on chip (NoC)

An interconnect that sends packets through routers instead of wiring a crossbar. It pays off when many blocks and long wires make a crossbar too large.

Packets Versus Crossbar

Peak and sustained bandwidth

Peak is width times frequency: 4 bytes x 96 MHz = 384.0 MB/s. Sustained is what survives bubbles, arbitration and bridges: 361.4 MB/s at burst 16.

Link Table and Sustained Rates

Quality of service (QoS)

Per-master priority or bandwidth rules that bound how much a contended slave favours one master over another.

QoS in Practice on NanoSoC

Starvation

A master that is never granted because others always win. Round robin bounds the wait; fixed priority does not.

Starvation, Priority and Shaping

Back to the Glossary for the other groups and the look-alike terms.

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See also

  • Glossary: Power
  • Glossary: Interrupts and DMA
  • Glossary: Memory, boot and security