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Course contents

  • How to Use This Course
  • The NanoSoC Tour
  • Reading Path
  • SoC Glossary10
    • Glossary: Address and decode
    • Glossary: Interconnect
    • Glossary: Clocks and resets
    • Glossary: Power
    • Glossary: Interrupts and DMA
    • Glossary: Memory, boot and security
    • Glossary: Integration and handoff
    • Glossary: Verification, test and bring-up
    • Glossary: Package and I/O
    • Glossary: Signoff and process
  • SoC Metrics Reference
  • SoC Cheatsheet
  • What SoC Integration Is12
  • Architecture and Budgets21
  • Memory Maps and Address Decode26
  • Interconnect and Bus Fabrics26
  • Clock and Reset Architecture24
  • Power Architecture21
  • Interrupts, DMA and Peripherals15
  • Memories, Boot and Security21
  • IP Integration and Handoff21
  • Top-Level Verification and Bring-up21
  • Package, Pads and I/O18
  • Chip Signoff and Tapeout18
  • SoC Interview Prep16
  • Capstone: Integrate NanoSoC14
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←SoC Glossary
  1. Topics
  2. SoC Design
  3. SoC Glossary
  4. Glossary: Package and I/O

SoC DesignAll levels

Glossary: Package and I/O

SoC integration glossary terms: package and i/o.

Package and I/O

Term

Meaning

Taught in

Ball-out

The assignment of signals to package balls, reviewed for supply spread, signal pairing and board routing.

Ball Assignment Rules

Decoupling hierarchy

Capacitance at each level, from on-die to package to board, each covering a different frequency range.

Decoupling Hierarchy

Drive strength

The current an output pad can source or sink. Stronger drive switches faster but adds supply noise.

Power-Ground Pairing and Drive Strength

Escape routing

Getting signals from inner package balls out to the board. It limits how a ball-out can be arranged.

Pinout Review and Escape Routing

ESD protection

Structures that conduct electrostatic discharge away from the core. Their paths must work between every pair of pads and supplies.

What the Integrator Checks

I/O ring

The ring of pads and their cells around the die, carrying signals, supply and protection.

The I/O Ring

Latch-up

A parasitic structure that shorts the supply when triggered. The guard rings and spacing rules at the pad-to-core interface prevent it.

Pad-to-Core Interfaces and Latch-Up

Pad reset state

What each pad does while reset is asserted: input, output, pull. A bad state can fight an external driver.

Pad Function, Drive and Reset State

Rail sequencing

The order in which supplies rise and fall, so no domain is driven before its supply is valid.

Supply Paths and Rail Sequencing

Signal and supply pad budget

How many pads carry signals and how many carry power and ground. Too few supply pads makes simultaneous switching noise worse.

Signal Versus Supply Pad Budget

Simultaneous switching noise (SSN)

Supply bounce when many outputs switch together, estimated from the current step, the loop inductance and the number of outputs.

Simultaneous Switching Noise Estimation

Back to the Glossary for the other groups and the look-alike terms.

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See also

  • Glossary: Address and decode
  • Glossary: Interconnect
  • Glossary: Clocks and resets