Deeper stages raise achievable frequency but lengthen flush penalties and expose more bubbles. Judge a split by throughput, IPC times frequency, at equal power.
Hazard counters belong in separate classes. RAW stalls, structural stalls and flush waste imply different fixes, so one blended counter hides the mechanism.
Compare IPC times frequency at equal power before and after the split. Then inspect the CPI components: if branch recovery and dependency stalls absorb the frequency gain, the deeper pipeline loses.
RAW stalls point at forwarding and scheduling, structural stalls at provisioning, and flush waste at fetch and recovery. A blended total suggests one generic fix that fits none of them.
When select logic ignores age or kill semantics and stale producer data is forwarded across a replay or exception window. The fix is age-priority select plus trace and property checks over those windows.
Stall signature | Likely class | Fix direction |
|---|---|---|
Producer-consumer chains stall with free function units | RAW data hazard | Forwarding path or scheduler priority |
Ready instructions wait with busy units | Structural hazard | Provisioning or port scheduling |
High flush rate with good predictor accuracy | Recovery and fetch bandwidth | Shorten resolution path or widen fetch |
Accuracy alone misleads. MPKI ties misses to instruction volume, and recovery cycles times frequency ties them to CPI.
A better predictor with flat IPC means something else caps the front end. Check fetch bandwidth, predictor lookup latency and wrong-path pollution next.
MPKI normalizes misses by instruction volume, so it converts directly into lost throughput. An accuracy gain on branch-poor code changes almost no retired instructions.
Fetch bandwidth saturation, predictor lookup latency added to the fetch stage, and wrong-path micro-op share occupying issue and reorder capacity. Any of these caps useful issue rate despite fewer mispredicts.
Multiply mispredict frequency by recovery cycles, using mean and high-percentile recovery. Percentiles matter because deep flushes on critical branches dominate the CPI term.
Branch CPI contribution
formula: delta_CPI = MPKI x recovery_cycles / 1000
example: MPKI = 6 misses per kilo-instruction, penalty = 12 cycles
result: 6 x 12 / 1000 = 72 / 1000 = 0.072 cycles per instructionOut-of-order execution buys IPC on irregular code with unpredictable latencies. It charges area, power and verification complexity for the scheduler, rename tables and replay machinery.
SMT shares one core between threads. It helps when the front end or back end would otherwise idle, and it never doubles throughput.
In-order, when determinism and performance per watt dominate and the workload has predictable control flow. Out-of-order wins only if the workload has enough irregular latency to repay its area, power and verification cost.
SMT pays when single-thread execution leaves fetch or issue slots idle and the thread mix shares caches without thrashing. It costs register-file and queue area, harder verification, and a wider side-channel surface.
Any unresolved correctness mismatch, or a worst-corner timing failure, triggers rollback even with a CPI gain. Performance never outranks silent-data risk.
The model below checks branch CPI arithmetic against hand calculation. It is an arithmetic check, not a hardware model.
module branch_cpi_model (
input logic [15:0] mpki,
input logic [15:0] penalty,
output logic [31:0] cpi_add_x1000
);
always_comb cpi_add_x1000 = mpki * penalty;
endmodule
module tb_branch_cpi;
logic [15:0] mpki;
logic [15:0] penalty;
logic [31:0] cpi_add_x1000;
branch_cpi_model dut (.*);
int bad = 0;
initial begin
mpki = 6; penalty = 12; #1;
if (cpi_add_x1000 != 72) bad++;
mpki = 4; penalty = 15; #1;
if (cpi_add_x1000 != 60) bad++;
if (bad == 0) $display("PASS: branch CPI adder gives 0.072 and 0.060 for the two hand cases");
else $display("FAIL: %0d checks wrong", bad);
$finish;
end
endmoduleMechanism, before and after counters, trace window, bounded fix, regression surface and an owner-approved release decision with reproducible artifacts.