Difficulty: Easy · Puzzle 1 of 6 · Topic: APB Protocol Puzzles
AMBA APB (APB3/APB4). A trace of PSEL, PENABLE and PREADY over 8 cycles is below (the slave also drives PREADY high in some setup cycles). Classify every cycle and say how many transfers complete and in which cycles.
`timescale 1ns/1ns
module tb;
localparam int N = 8;
// cycle: 01234567
localparam bit [0:N-1] PSEL = 8'b01111100;
localparam bit [0:N-1] PENABLE = 8'b00101100;
localparam bit [0:N-1] PREADY = 8'b01110100; // slave drives PREADY high in some setup cycles too
bit clk = 0;
int cyc = 0, done = 0;
always #5 clk = ~clk;
wire psel = PSEL[cyc], penable = PENABLE[cyc], pready = PREADY[cyc];
always @(posedge clk) begin
string ph;
if (!psel) ph = "IDLE";
else if (!penable) ph = "SETUP";
else if (!pready) ph = "ACCESS (wait)";
else begin ph = "ACCESS (complete)"; done++; end
$display("cycle %0d: %s", cyc, ph);
if (cyc == N-1) $display("completed transfers = %0d", done);
cyc <= cyc + 1;
end
initial #(10*N) $finish;
endmoduleA transfer completes in a cycle where PSEL, PENABLE and PREADY are all high.
1) Cycle 0: PSEL=0 -> IDLE.
2) Cycle 1: PSEL=1, PENABLE=0 -> SETUP. PREADY=1 is ignored in setup.
3) Cycle 2: PSEL=1, PENABLE=1, PREADY=1 -> ACCESS completes transfer 1.
4) Cycle 3: PSEL=1, PENABLE=0 -> SETUP of transfer 2 (back-to-back, PSEL stays high; PREADY=1 is again ignored).
5) Cycle 4: ACCESS with PREADY=0 -> wait state. Cycle 5: ACCESS with PREADY=1 -> transfer 2 completes. Cycles 6-7: idle.Answer: Two transfers complete: one in cycle 2 and one in cycle 5 (after one wait state in cycle 4).
Checked by running the code in Verilator 5; the printed output supports the answer above. Phase decoding from PSEL/PENABLE/PREADY: PREADY high in setup cycles 1 and 3 completes nothing.
PREADY is only meaningful in the access phase. Counting PSEL && PREADY would give four 'transfers' (cycles 1, 2, 3, 5): the slave tying PREADY high does not complete anything in a setup cycle.
A slave ties PREADY permanently high. How many clocks does each APB transfer take, and what is the peak rate? Model answer: Exactly two clocks (one SETUP, one ACCESS), so the peak is one transfer every two clocks, i.e. 50% of the clock rate.