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Course contents

  • RTL Foundations36
  • Combinational Design25
  • Sequential Design27
  • FSM & Control27
  • Timing & Clocking39
  • Reset & CDC34
  • Memory & Buses57
    • SRAM and ROM
    • Register Files
    • Valid/Ready Handshake
    • AXI-Lite
    • AXI-Stream
    • Bus Integration
    • Synchronous FIFO
    • Register-Map and CSR RTL
      • CSR Contract and Address Map
      • Field Access Types
      • Hardware/Software Arbitration
      • Byte Strobes and Partial Writes
      • Atomic and Shadowed Updates
      • Interrupt Register Pattern
      • Adapter and Signoff
      • Generated Register Workflow
      • The Firmware Side: a C Driver for W1C, RC and Shadow Registers
    • Memory Reliability
    • Peripheral RTL Integration
    • Full AXI4: RTL Roadmap
  • Advanced RTL28
  • Senior & Interview76
  • Glossary and Notation
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‹Register-Map and CSR RTL
  1. Topics
  2. RTL Design
  3. Memory & Buses
  4. Register-Map and CSR RTL
  5. Byte Strobes and Partial Writes

Part 7 · Memory & Buses · Intermediate

Byte Strobes and Partial Writes

Convert bus byte enables into a bit mask and preserve every byte not selected by the transfer.

On this page

    Why this matters

    A narrow software store must not change the bytes next to it. A W1C field that uses wdata without wstrb lets an unselected byte acknowledge events.

    After this lesson you can: expand byte strobes into one bit mask and use it for RW replacement, W1C clears and command qualification.

    Expand strobes once

    CONTROL, IRQ_ENABLE, and the two LIMIT shadow words all consume the same expanded byte mask. That shared derivation keeps a narrow software store from changing adjacent fields.

    WSTRB 0100 becomes write mask 00FF0000: only byte 2 of the old value 11223344 is replaced, giving 11BB3344

    Read each column from top to bottom: one strobe bit becomes eight mask bits, and the mask picks either the old byte or the new one.

    • Strobe to mask: strobe bit 2 is 1, so mask byte 2 is FF; the other mask bytes are 00.

    • Merge: the result takes BB from the write data in byte 2 and keeps 11, 33 and 44 from the old value.

    • W1C uses the same mask: its clear mask is wdata & write_mask, so ones written in unselected bytes clear nothing.

    design.sv
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    // snippet: 32-bit write mask from four byte strobes
    logic [31:0] write_mask;
    always_comb
      for (int b = 0; b < 4; b++) write_mask[b*8 +: 8] = {8{wstrb[b]}};
    
    assign rw_next = (rw_q & ~write_mask) | (wdata & write_mask);
    assign w1c_mask = wdata & write_mask;

    The same mask feeds RW replacement, W1C clear masks, and command qualification. Centralizing it prevents each register from interpreting strobes differently.

    Write

    Result

    WSTRB=0001

    Only bits 7:0 may change

    WSTRB=0100

    Only bits 23:16 may change

    WSTRB=0000

    No state change

    Unaligned access

    Reject or split in the adapter; never reinterpret silently

    Try it: partial writes

    The tool starts on the figure above: an RW field holding 11223344, write data AABBCCDD and WSTRB 0100, so only byte 2 is replaced and the result is 11BB3344.

    Register field access

    Loading register field tool…

    Simplified: the whole 32-bit register is one field of the chosen type. The strobe toggles are WSTRB[3:0], MSB first: WSTRB[3] covers bits 31:24 and WSTRB[0] bits 7:0.
    • Turn on WSTRB[0] (strobe 0101): bytes 2 and 0 are replaced and the result is 11BB33DD.

    • Choose W1C, set the current value and the write data to FFFFFFFF and the strobe to 0010: only bits 15:8 clear, giving FFFF00FF, as in the check below.

    • Set the strobe to 0000: no access type changes the field, whatever the write data.

    Common pitfall

    A W1C field must apply both wdata and wstrb. Clearing from wdata alone lets an unselected byte accidentally acknowledge events.

    Check yourself Software writes all ones with only byte strobe 1 asserted. Which W1C bits clear?

    Only bits 15:8. Written ones outside the selected byte are not part of the transfer.

    Remember

    • Expand the strobes once, and feed the same mask to every register.

    • RW fields update only where the mask is set.

    • W1C clears need both wdata and wstrb.

    Keep going

    • Practice: AXI4 write channel with write strobe (WSTRB) support

    • Interview: run a mock interview on this topic

    Related topics

    • Atomic and shadowed updates

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    See also

    • CSR Contract and Address Map
    • Field Access Types
    • Interrupt Register Pattern